UPD784224 Datasheet, PDF (4/92 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCONTROLLERS

µPD784224, 784225, 784224Y, 784225Y
FUNCTIONS
Part Number
Item
Number of basic instructions
(mnemonics)
General-purpose register
Minimum instruction execution
time
Internal
memory
ROM
RAM
Memory space
I/O port
Total
CMOS Input
Pins with
ancillary
functions^{Note 1}
CMOS I/O
Pins with pull-up
resistor
LEDs direct
drive output
Real-time output port
Timer
Serial interface
A/D converter
D/A converter
Clock output
Buzzer output
Watch timer
Watchdog timer
Standby
Interrupt
Hardware
Software
Non-maskable
Maskable
Supply voltage
Package
µPD784224,
µPD784224Y
113
µPD784225,
µPD784225Y
8 bits × 16 registers × 8 banks, or 16 bits × 8 registers × 8 banks (memory mapping)
• 160 ns/320 ns/640 ns/1,280 ns/2,560 ns (main system clock: fXX = 12.5 MHz)
• 61 µs (subsystem clock: fXT = 32.768 kHz)
96 Kbytes
128 Kbytes
3,584 bytes
4,352 bytes
1 MB with program and data spaces combined
67
8
59
57
16
4 bits × 2, or 8 bits × 1
Timer/event counter
(16-bit)
: Timer counter × 1
Capture/compare register × 2
Pulse output
• PWM/PPG output
• Square wave output
• One-shot pulse output
Timer/event counter 1 : Timer counter × 1
(8-bit)
Compare register × 1
Pulse output
• PWM output
• Square wave output
Timer/event counter 2 : Timer counter × 1
(8-bit)
Compare register × 1
Pulse output
• PWM output
• Square wave output
Timer 5
(8-bit)
: Timer counter × 1
Compare register × 1
Timer 6
(8-bit)
: Timer counter × 1
Compare register × 1
• UART/IOE (3-wire serial I/O): 2 channels (on-chip baud rate generator)
• CSI (3-wire serial I/O, I²C bus^{Note 2} supporting multi master): 1 channel
8-bit resolution × 8 channels
8-bit resolution × 2 channels
Selectable from fXX, fXX/2, fXX/2², fXX/2³, fXX/2⁴, fXX/2⁵, fXX/2⁶, fXX/2⁷, fXT
Selectable from fXX/2¹⁰, fXX/2¹¹, fXX/2¹², fXX/2¹³
1 channel
1 channel
• HALT/STOP/IDLE mode
• In power-saving mode (with subsystem clock): HALT/IDLE mode
25 (internal: 18, external: 7)
BRK instruction, BRKCS instruction, operand error
Internal: 1, external: 1
Internal: 17, external: 6
• 4 programmable priority levels
• 3 service modes: vectored interrupt/macro service/context switching
VDD = 1.8 to 5.5 V
• 80-pin plastic QFP(14 × 14 mm)
• 80-pin plastic TQFP (fine pitch) (12 × 12 mm)
Notes 1. The pins with ancillary functions are included in the I/O pins.
2. µPD784225Y Subseries only
4
Data Sheet U12376EJ1V0DS00