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UPD784224 Datasheet, PDF (11/92 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCONTROLLERS
µPD784224, 784225, 784224Y, 784225Y
4. BLOCK DIAGRAM
INTP2/NMI
INTP0, INTP1,
INTP3 to INTP5
TI00
TI01
TO0
TI1
TO1
TI2
TO2
PROGRAMMABLE
INTERRUPT
CONTROLLER
TIMER/EVENT
COUNTER
(16 BITS)
TIMER/EVENT
COUNTER1
(8 BITS)
TIMER/EVENT
COUNTER2
(8 BITS)
TIMER/COUNTER5
(8 BITS)
TIMER/COUNTER6
(8 BITS)
WATCH TIMER
RTP0 to RTP7
NMI/INTP2
ANO0
ANO1
AVREF1
AVSS
ANI0 to ANI7
AVDD
AVSS
P03/INTP3
PCL
BUZ
WATCHDOG TIMER
REAL-TIME
OUTPUT PORT
D/A
CONVERTER
A/D
CONVERTER
CLOCK OUTPUT
CONTROL
BUZZER OUTPUT
78K/IV
CPU CORE
ROM
RAM
UART/IOE1
BAUD-RATE
GENERATOR
UART/IOE2
BAUD-RATE
GENERATOR
CLOCKED
SERIAL
INTERFACE
BUS I/F
PORT0
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
PORT12
PORT13
SYSTEM CONTROL
RxD1/SI1
TxD1/SO1
ASCK1/SCK1
RxD2/SI2
TxD2/SO2
ASCK2/SCK2
SI0/SDA0Note
SO0
SCK0/SCL0Note
AD0 to AD7
A8 to A15
A16 to A19
RD
WR
WAIT
ASTB
EXA
P00 to P05
P10 to P17
P20 to P27
P30 to P37
P40 to P47
P50 to P57
P60 to P67
P70 to P72
P120 to P127
P130, P131
RESET
X1
X2
XT1
XT2
VDD0, VDD1
VSS0, VSS1
TEST
Note This function supports the I2C bus interface and is available in µPD784225Y Subseries only.
Remark The internal ROM and RAM capacities differ depending on the model.
Data Sheet U12376EJ1V0DS00
11