UPD78P4916 Datasheet, PDF (35/56 Pages) NEC – 16-BIT SINGLE-CHIP MICROCONTROLLER

µPD78P4916
CFG Amplifier (AC Coupling) (TA = 25 ˚C, VDD = AVDD = 5 V, VSS = AVSS = 0 V)
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
Voltage gain 1
GCFG1
fi = 2 kHz, open loop
50
dB
Voltage gain 2
GCFG2
fi = 2 kHz, open loop
34
dB
CFGAMPO output current, high
IOHCFG
DC
–1
mA
CFGAMPO output current, low
IOLCFG
DC
0.4
mA
Comparator high voltage
VCFGH
VREF+0.09 VREF+0.12 VREF+0.15 V
Comparator low voltage
VCFGL
VREF–0.15 VREF–0.12 VREF–0.09 V
Duty precision
PDUTY
See Note below.
49.7
50.0
50.3
%
Note
The following circuit and input signal conditions are assumed.
• Input signal: sine wave input (5 mVp-p), fi = 1 kHz
1 kΩ
• Voltage gain: 50 dB
22 µF
330 kΩ
µPD78P4916
CFGIN
0.01 µF
CFGAMPO
CFGCPIN
DFG Amplifier (AC Coupling) (TA = 25 ˚C, VDD = AVDD = 5 V, VSS = AVSS = 0 V)
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
Voltage gain
GDFG
fi = 900 Hz, open loop
50
dB
Feedback resistance
RFDFG
160
400
640
kΩ
Input protect resistance
RIDFG
150
Ω
Comparator high voltage
VDFGH
VREF+0.07 VREF+0.10 VREF+0.14 V
Comparator low voltage
VDFGL
VREF–0.14 VREF–0.10 VREF–0.07 V
Caution The resistance of the pin to be connected to the DFGIN pin must be below 16 kΩ. If the resistance
is higher than the limit, the DFG amplifier may oscillate.
DPG Comparator (AC Coupling) (TA = 25 ˚C, VDD = AVDD = 5 V, VSS = AVSS = 0 V)
Parameter
Input impedance
Comparator high voltage
Comparator low voltage
Symbol
ZIDPG
VDPGH
VDPGL
Conditions
MIN. TYP. MAX. Unit
20
50
100
kΩ
VREF+0.02 VREF+0.05 VREF+0.08 V
VREF–0.08 VREF–0.05 VREF–0.02 V
35