UPD78P4916 Datasheet, PDF (20/56 Pages) NEC – 16-BIT SINGLE-CHIP MICROCONTROLLER

µPD78P4916
3. INTERNAL MEMORY CAPACITY SELECT REGISTER (IMS)
Internal memory capacity select register (IMS) specifies the effective area of on-chip memory (PROM, RAM) of
the µPD78P4916. Setting this register is required when the capacity of the ROM or RAM in the mask version is
smaller than that of the µPD78P4916. If the memory capacity of the µPD78P4916 is appropriately defined using
this register, bugs in application programs due to accessing an address beyond the memory capacity of the actual
chip can be avoided.
The IMS register is write-only register. To write this register, use the 8-bit manipulation instruction.
The register is initialized to FFH by RESET input (ROM: 62 Kbytes, RAM: 2048 bytes).
*
Figure 3-1. Internal Memory Capacity Select Register (IMS) Format
7
6
5
4
3
2
1
0 Address State at reset R/W
IMS
1
1 ROM1 ROM0 1
1 RAM1 RAM0 FFFCH
FFH
W
RAM1 RAM0 Specification of internal RAM capacity
0
1 1280 bytes
1
1 2048 bytes
Other
Setting prohibited
ROM1 ROM0 Specification of internal ROM capacity
1
0 48 Kbytes
1
1 62 Kbytes
Other
Setting prohibited
Caution The µPD78P4916 has the IMS and the µPD784915 and 784916A do not have it. However, if a
write instruction to IMS is executed in the µPD784915 or 784916A, it does not cause conflicts
or malfunctions.
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