UPD98402A Datasheet, PDF (11/26 Pages) NEC – LOCAL ATM SONET FRAMER

µPD98402A
• Control
Symbol
TFSS
RESET
TCL
RCL
TxFP
RxFP
Pin No.
I/O
29
I
103
I
32
O
85
O
31
O
30
O
I/O Level
TTL
TTL
CMOS
CMOS
CMOS
CMOS
Function
This is the transmit frame setting signal input pin.
It allows synchronization timing of transmit frame output to be
set. The µPD98402A samples this input signal by the internal
transmit system clock (TCL).
Initial output of the transmit frame is restarted 9 clocks into
TCL clock cycle after a high level is latched at TCL rise.
This is the system reset signal input pin.
It initializes the µPD98402A. It is necessary to input a reset
signal with a pulse width of 2 cycles or more of the clock that
has the longest cycle among the following clocks input to the
µPD98402A.
ATM layer : TCLK, RCLK clock cycles
PMD layer : 1/8 cycle of TFKT/TFKC, RCIC/RCIT clocks,
TFC, RPC clock cycles
Immediately after a reset, no read/write is possible to registers
during 5 clocks of the TCL clock (19.44 MHz).
This pin is used to output an internal transmit system clock.
The µPD98402A outputs as the internal transmit system clock,
the TFKT/TFKC input clock (155.52 MHz) scaled by 8 in serial
interface mode, and the TFC input clock (19.44 MHz) in
parallel interface mode.
This pin is used to output an internal receive system clock.
The µPD98402A outputs as the internal receive system clock,
the RCIC/RCIT input clock (155.52 MHz) scaled by 8 in serial
interface mode, and the RFC input clock (19.44 MHz) in
parallel interface mode.
This is a frame pulse signal on the transmitting side. It
outputs pulses synchronous with the transmit frame start. To
be inactive after reset.
This is a frame pulse signal on the receiving side. It outputs
pulses synchronous with the receive frame start. To be
inactive after reset.
• JTAG boundary scan pins (This function can be supported at the customer’s request.)
Symbol
TJI
TDO
TCK
TMS
TRST
Pin No.
I/O
4
I
3
O
2
I
5
I
6
I
I/O Level
TTL
CMOS
TTL
TTL
TTL
Function
This is a pin for JTAG boundary scan.
Pull it up or ground it in normal operation.
This is a pin for JTAG boundary scan.
Leave it open in normal operation.
This is a pin for JTAG boundary scan.
Pull it up or ground it in normal operation.
This is a pin for JTAG boundary scan.
Pull it up or ground it in normal operation.
This is a pin for JTAG boundary scan.
Ground it in normal operation.
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