MC145574 Datasheet, PDF (85/164 Pages) Motorola, Inc – ISDN S/T-Interface Transceiver

Freescale Semiconductor, Inc.
BR9(7:4)
NT: SC2 to Loop — BR9(7:4) is used for multiframing. In the NT mode of operation, these four bits
correspond to subchannel 2 for transmission to the TE(s). Multiframing is initiated by the NT by setting
BR7(5). When multiframing is enabled, the NT will transmit the bits in BR9(7:4) as subchannel 2, in
accordance with CCITT I.430, ETSI ETS 300012, and ANSI T1.605. BR9(7:4), are internally polled
at the start of every multiframe (this occurs every 5 ms and the device can be programmed to give
an interrupt at the start of every multiframe), and the contents are interpreted as subchannel 2. If
multiframing is enabled and the contents of BR9(7:4) have not been updated, the subchannel is re–
transmitted as is. BR9(7:4) can be updated any time between the 5 ms interrupts. In the NT mode
of operation, BR9(7:4) are write only bits. These bits are reset to 0 by application of either a software
or hardware reset. Note that BR9(7) is the MSB of SC2 and BR9(4) is the LSB. Refer to Section 10
for a detailed description of the multiframe procedure.
TE: SC2 from Loop — BR9(7:4) are used in the multiframing mode of operation. When the device
is configured as a TE and multiframing has been enabled, these bits correspond to the received sub-
channel 2 nibble from the NT. These bits are updated once every multiframe. BR9(7:4) are read only
bits and are reset to 0 by application of either a software or hardware reset. Note that BR9(7) is the
MSB of SC2 and BR9(4) is the LSB. Refer to Section 10 for a detailed description of the multiframe
procedure.
BR9(3:0)
NT: SC3 to Loop — BR9(3:0) is used for multiframing. In the NT mode of operation, these four bits
correspond to subchannel 3 for transmission to the TE(s). When multiframing is enabled, the NT will
transmit the bits in BR9(3:0) as subchannel 3, in accordance with CCITT I.430, ETSI ETS 300012,
and ANSI T1.605. BR9(3:0) are internally polled at the start of every multiframe (this occurs every
5 ms and the device can be programmed to give an interrupt at the start of every multiframe), and
the contents are interpreted as subchannel 3. If multiframing is enabled and the contents of BR9(3:0)
have not been updated, the subchannel is re–transmitted as is. BR9(3:0) can be updated any time
between the 5 ms interrupts. In the NT mode of operation, BR9(3:0) are write only bits. These bits
are reset to 0 by application of either a software or hardware reset. Note that BR9(3) is the MSB of
SC3 and BR9(0) is the LSB. Refer to Section 12 for a detailed description of the multiframe procedure.
TE : SC3 from Loop — BR9(3:0) are used in the multiframing mode of operation. When the device
is configured as a TE and multiframing has been enabled, these bits correspond to the received sub-
channel 3 nibble from the NT. These bits are updated once every multiframe. BR9(3:0) are read only
bits and are reset to 0 by application of either a software or hardware reset. Note that BR9(3) is the
MSB of SC2 and BR9(0) is the LSB. Refer to Section 10 for a detailed description of the multiframe
procedure.
9.12 BR10
BR10
(7)
NT:
TXSC4.1
TE:
RXSC4.1
(6)
NT:
TXSC4.2
TE:
RXSC4.2
(5)
NT:
TXSC4.3
TE:
RXSC4.3
(4)
NT:
TXSC4.4
TE:
RXSC4.4
(3)
NT:
TXSC5.1
TE:
RXSC5.1
(2)
NT:
TXSC5.2
TE:
RXSC5.2
(1)
NT:
TXSC5.3
TE:
RXSC5.3
(0)
NT:
TXSC5.4
TE:
RXSC5.4
BR10(7:4)
NT: SC4 to Loop — BR10(7:4) are used for multiframing. In the NT mode of operation, these four
bits correspond to subchannel 4 for transmission to the TE(s). When multiframing is enabled, the NT
will transmit the bits in BR10(7:4) as subchannel 4, in accordance with CCITT I.430, ETSI ETS 300012,
and ANSI T1.605. BR10(7:4) are internally polled at the start of every multiframe (this occurs every
5 ms and the device can be programmed to give an interrupt at the start of every multiframe), and
the contents are interpreted as subchannel 4. If multiframing is enabled and the contents of BR10(7:4)
have not been updated, the subchannel is re–transmitted as is. BR10(7:4) can be updated any time
between the 5 ms interrupts. In the NT mode of operation, BR10(7:4) are write only bits. These bits
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