MC145574 Datasheet, PDF (64/164 Pages) Motorola, Inc – ISDN S/T-Interface Transceiver

7.2.3
Freescale Semiconductor, Inc.
TE/NT
This pin allows the external selection of NT or TE mode. When this pin is held low, the NT mode
is selected; and when it is held high, the TE mode is selected. This pin is OR’d with an SCP register
bit, enabling TE/NT selection to be made in the software. This pin must be tied low to allow software
selection of TE or NT mode.
7.2.4
M/S
This pin allows the external selection of master or slave timing mode for the IDL2/GCI interface. This
pin functions in both NT and TE modes. When this pin is held low, the slave mode is selected; and
when it is held high, the master mode is selected. In the slave mode FSC/DCL are inputs; in the master
mode FSC/DCL are outputs.
This pin is OR’d with an SCP register bit, enabling master/slave selection to be made in the software.
This pin must be tied low to allow software selection of master or slave mode.
7.2.5
T_IN/TFSC/TCLK/FIX
This pin performs four functions dependent on the mode of operation. In all NT modes, except NT
Terminal mode, this pin is the FIX input and enables the device to differentiate between fixed and
adaptive timing modes. When this pin is held low, adaptive timing is selected, and when it is held
high fixed timing is selected. This pin is OR’d with an SCP register bit, enabling fixed/adaptive selection
to be made in the software.
In the NT Terminal mode, this pin is the T_IN input; T_IN is an IDL2 input port that accepts B1, B2,
and D channel data. Refer to the NT Terminal section for further details. In the NT Terminal mode,
the FIX function is controlled via an SCP register bit.
In the TE slave mode, this pin outputs TFSC. TFSC is an 8 kHz frame clock that is synchronized
to the received S/T–interface and can be used as the synchronization source in the NT2 slave–slave
mode.
Alternatively, this pin can output TCLK, selected via the SCP. TCLK is a clock, whose frequency can
be chosen via the SCP, which is synchronized to the received S/T–interface. TCLK can be used as
an alternative to TFSC in NT2 slave–slave mode.
In the TE master mode, this pin has no function and is a high–impedance output.
7.2.6
VSS
This is the most negative power supply and digital logic ground. It is normally 0 V.
7.2.7
SG/DGRANT/ANDOUT
This pin performs three functions dependent on the mode of operation. In the NT1 Star mode, it is
the ANDOUT output function for use in NT1 Star applications. In the TE master and NT Terminal modes,
this pin is the DGRANT output function used for gaining D channel access. In the GCI TE master
mode, this pin is SG and indicates stop/go access to the D channel.
7.2.8
DREQUEST/ANDIN
This pin performs two functions dependent on the mode of operation. In the NT1 Star mode, it is the
ANDIN input function for use in NT1 Star applications. In the TE master and NT Terminal modes,
this pin is the DREQUEST input used for requesting D channel access. In all other modes, this input
has no defined function and should be tied to VSS.
7–2
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