MC145574 Datasheet, PDF (41/164 Pages) Motorola, Inc – ISDN S/T-Interface Transceiver

5.2.3
Freescale Semiconductor, Inc.
SCP Byte Register Read
A byte register read is a 16–bit SCP transaction. Figure 5–3 illustrates this process. To initiate an
SCP byte register read, the SCPEN is brought low. Following this, an R/W bit is shifted in from SCP
Rx on the next rising edge of SCPCLK. This bit determines the operation to be performed; read or
write.
SCPEN
SCPCLK
SCP Rx DON’T CARE R/W
A3 A2 A1 A0
DON’T CARE
SCP Tx
HIGH IMPEDANCE
D7 D6 D5 D4 D3 D2 D1 D0
NOTES:
1. R/W = 1 for a read operation.
2. Data is shifted out on SCP Tx on the falling edges of SCPCLK, MSB first.
3. Data is shifted into the chip from SCP Rx on the rising edges of SCPCLK, MSB first.
HIGH
IMPEDANCE
Figure 5–3. Serial Control Port Byte Register Read Operation
If R/W is a 1, then a read operation is selected. Conversely, if R/W is a 0, then a write operation is
selected. The next three bits shifted in from SCP Rx on the three subsequent rising edges of
SCPCLK are primary address bits (A0 – A2 = 7), as mentioned previously. With all three bits equal
to 1, nibble register 7 (NR7) is selected. This is a pointer register, the selection of which informs the
device that a byte operation is to be performed. When NR7 is selected, the following four bits shifted
in from SCP Rx on the following four rising edges of SCPCLK are automatically written to NR7. These
four bits are the address bits for the byte operation. In a read operation, the next eight falling edges
of SCPCLK shift out the data from the selected byte register on SCP Tx.
As mentioned previously, an SCP byte access is a 16–bit transaction. This can take place in one 16–bit
exchange or two 8–bit exchanges. If the transaction is performed in two 8–bit exchanges, the SCPEN
should be returned high after the first eight bits have been shifted into the part.
When SCPEN comes low again, the MSB of the selected byte presents itself on SCP Tx. The following
seven falling edges of SCPCLK shift out the remaining seven bits of the byte register. Note that the
order in which data is written into the part and read out of the part is independent of whether the byte
access is done in one 16–bit exchange or in two 8–bit exchanges. Figure 5–4 illustrates this process.
MOTOROLA
For More InforMmCa1t4i5o5n74On This Product,
5–3
Go to: www.freescale.com