DSP56309UM Datasheet, PDF (52/424 Pages) Motorola, Inc – 24-Bit Digital Signal Processor

Freescale Semiconductor, Inc.
Signal/Connection Descriptions
Ground
Table 2-2 Power Inputs (Continued)
Power Name
Description
V_CCS (2)
ESSI, SCI, and Timer PowerÑV_CCS is an isolated power for the ESSI,
SCI, and timer I/O drivers. This input must be tied externally to all
other chip power inputs except V_CCQL. The user must provide adequate
external decoupling capacitors. There are two V_CCS inputs.
Note:
These designations are package-dependent. Some packages connect all V_CC inputs except V_CCP to
each other internally. On those packages, all power input, except V_CCP, are labeled V_CC. The number
of connections indicated in this table are minimum values; the total V_CC connections are
package-dependent.
2.3 GROUND
Ground descriptions for the DSP56309 are listed in Table 2-3.
Table 2-3 Grounds
Ground Name
Description
GND_P
GND_P1
GND_Q (4)
GND_A (4)
PLL GroundÑGND_P is a ground dedicated for PLL use. The connection
should be provided with an extremely low-impedance path to ground.
V_CCP should be bypassed to GND_P by a 0.47 mF capacitor located as
close as possible to the chip package. There is one GND_P connection.
PLL Ground 1ÑGND_P1 is a ground dedicated for PLL use. The
connection should be provided with an extremely low-impedance path
to ground. There is one GND_P1 connection.
Quiet GroundÑGND_Q is an isolated ground for the internal processing
logic. This connection must be tied externally to all other chip ground
connections. The user must provide adequate external decoupling
capacitors. There are four GND_Q connections.
Address Bus GroundÑGND_A is an isolated ground for sections of the
address bus I/O drivers. This connection must be tied externally to all
other chip ground connections. The user must provide adequate
external decoupling capacitors. There are four GND_A connections.
2-6
DSP56309UM/D
MOTOROLA
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