DSP56309UM Datasheet, PDF (335/424 Pages) Motorola, Inc – 24-Bit Digital Signal Processor

Freescale Semiconductor, Inc.
M_RWU EQU 6
M_WOMS EQU 7
M_SCRE EQU 8
M_SCTE EQU 9
M_ILIE EQU 10
M_SCRIE EQU 11
M_SCTIE EQU 12
M_TMIE EQU 13
M_TIR EQU 14
M_SCKP EQU 15
M_REIE EQU 16
; Receiver Wakeup Enable
; Wired-OR Mode Select
; SCI Receiver Enable
; SCI Transmitter Enable
; Idle Line Interrupt Enable
; SCI Receive Interrupt Enable
; SCI Transmit Interrupt Enable
; Timer Interrupt Enable
; Timer Interrupt Rate
; SCI Clock Polarity
; SCI Error Interrupt Enable (REIE)
;
SCI Status Register Bit Flags
M_TRNE EQU 0
M_TDRE EQU 1
M_RDRF EQU 2
M_IDLE EQU 3
M_OR EQU 4
M_PE EQU 5
M_FE EQU 6
M_R8 EQU 7
; Transmitter Empty
; Transmit Data Register Empty
; Receive Data Register Full
; Idle Line Flag
; Overrun Error Flag
; Parity Error
; Framing Error Flag
; Received Bit 8 (R8) Address
;
SCI Clock Control Register
M_CD EQU
M_COD EQU
M_SCP EQU
M_RCM EQU
M_TCM EQU
$FFF
12
13
14
15
; Clock Divider Mask (CD0-CD11)
; Clock Out Divider
; Clock Prescaler
; Receive Clock Mode Source Bit
; Transmit Clock Source Bit
B.4 ESSI EQUATES
;------------------------------------------------------------------------
;Enhanced Synchronous Serial Interface (ESSI) Equates
;------------------------------------------------------------------------
;
Register Addresses Of SSI0
M_TX00 EQU
M_TX01 EQU
M_TX02 EQU
M_TSR0 EQU
M_RX0 EQU
M_SSISR0 EQU
M_CRB0 EQU
M_CRA0 EQU
M_TSMA0 EQU
M_TSMB0 EQU
$FFFFBC
$FFFFBB
$FFFFBA
$FFFFB9
$FFFFB8
$FFFFB7
$FFFFB6
$FFFFB5
$FFFFB4
$FFFFB3
; SSI0 Transmit Data Register 0
; SSIO Transmit Data Register 1
; SSIO Transmit Data Register 2
; SSI0 Time Slot Register
; SSI0 Receive Data Register
; SSI0 Status Register
; SSI0 Control Register B
; SSI0 Control Register A
; SSI0 Transmit Slot Mask Register A
; SSI0 Transmit Slot Mask Register B
MOTOROLA
DSP56309UM/D
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Equates
B-5