M5M4V16169DTP Datasheet, PDF (54/64 Pages) Mitsubishi Electric Semiconductor – 16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM

MITSUBISHI LSIs
M5M4V16169DTP/RT-7,-8,-10,-15
16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
DRAM Write Transfer 1 (WB1->WB2->DRAM)
Buffer Write Transfer (SRAM->WB1)
detail
1 2 3 4 5 6 7 8 9 10 11 12 13 14
K
tRC
CMd#
CS#
RAS#
CAS#
tRP
tRAS
tRCD
tRWL
DTD#
Ad0-2
Ad3-11
Row
Row
Ad0-Ad2=Low
**Col
WB2 [0-7]
WB1[0]
WB1 mask[0]
Old Data
New Data[from WB1(0-7)]
00
WB1[1]
WB1 mask[1]
11
WB1[2]
WB1 mask[2]
22
WB1[3]
WB1 masl[3]
33
WB1[4]
WB1 mask[4]
44
WB1[5]
WB1 mask[5]
55
WB1[6]
WB1 mask[6]
66
WB1[7]
WB1 mask[7]
77
DRAM
SRAM
DQ0-15
DPD DPD PCG DPD DPD DPD ACT ^DNOP DWT1 ^DNOP PCG DPD DPD DPD
SW SW SW SW SW SW SW SW BWT BWT SW SW SW SW
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3
MITSUBISHI ELECTRIC
54
(REV 1.0) Jul. 1998