M38197MA Datasheet, PDF (23/60 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Main
Local
address bus address bus
SI/O automatic
transfer RAM
(0F0016 to 0F1F16)
Main data Local data
bus
bus
Address decorder
SI/O automatic
transfer data
pointer
SI/O automatic
transfer
controller
SI/O automatic transfer
interval register
XCIN
XIN
P67/SRDY1/
CS/SCLK12
1/8
Internal
system clock
1/16
“1” _{selection bit}
1/32
1/64
Synchronous
“0”
P67 latch
clock selection
(Note)
bit
“1”
SRDY1 _{Synchronization}
circuit
1/128
1/256
Internal synchronous
“0” ^{clock selection bit}
CS
P66 latch
External clock
“0”
P66/SCLK11
“1”
Serial I/O1 port selection bit
P65/SOUT1
“0” _{P65 latch}
“1”
Serial I/O1 port selection bit
Serial I/O counter 1(3)
P64/SIN1
Serial I/O shift register 1(8)
Serial I/O automatic
transfer interrupt request
Serial I/O1
interrupt request
1/8
1/16
1/32
P53/SRDY2
P53 latch
“0”
SRDY2
“1”
SRDY2 output selection bit
Synchronous
clock selection
bit
“1”
Synchronization
circuit
External clock “0”
1/64
1/128
1/256
Internal synchronous
clock selection bit
“0” _{P52 latch}
P52/SCLK2
“1”
Serial I/O2 port selection bit
Serial I/O counter 2(3)
P51/SOUT2
“0” _{P51 latch}
“1”
Serial I/O2 port selection bit
P50/SIN2
Serial I/O shift register 2(8)
1/8
1/16
1/32
1/64
P57/SRDY3
P57 latch
“0”
“1”
SRDY3
SRDY2 output selection bit
“1”
Synchronization
circuit
External clock “0”
1/128
1/256
Internal synchronous
clock selection bit
“0” _{P56 latch}
P56/SCLK3
Serial I/O3 port“1s”election bit
P55/SOUT3
“0” _{P55 latch}
“1”
Serial I/O3 port selection bit
P54/SIN3
Serial I/O counter 3(3)
Serial I/O shift register 3(8)
Serial I/O2
interrupt request
Serial I/O3
interrupt request
Note: Selected with the synchronous clock selection bit, SRDY1 output selection bit, serial I/O1 port selection bit (these 3 bits are of the serial
I/O1 control register), automatic transfer control bit, and synchronous clock output pin selection bit (these 2 bits are ofthe serial I/O
automatic transfer register).
Fig. GA-1 Serial I/O block diagram
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