MT90500 Datasheet, PDF (78/159 Pages) Mitel Networks Corporation – Multi-Channel ATM AAL1 SAR

MT90500
4.7.3 Microprocessor Access and Device Reset
Upon hardware reset (using the RESET pin) of the MT90500, the microprocessor registers go to their
respective reset states, as indicated in the register descriptions. Further, the SRES bit in Register 0000h is set
LOW, “latching” the reset state. No registers other than the Microprocessor Interface Registers can (nor
should) be accessed until the SRES bit is set HIGH. Steps to reset and restart the MT90500 are therefore:
1. Assert hardware RESET (and optionally TRISTATE), or write register 0000h to 0000h.
2. Remove hardware reset.
3. Allow at least 75 MCLK clock cycles (about 2 µsec at 60 MHz).
4. Write register 0000h to 4400h (enable normal internal clocks).
5. Write register 0000h to C400h (de-assert SRES).
6. Write register 0000h to desired functional setting.
7. Write other MT90500 registers. (Note that configuration bits must generally be programmed before
setting process enable bits.)
4.8 Test Interface
The MT90500 contains an IEEE 1149 standard Test Access Port (TAP), which provides Boundary-Scan test
access to aid board-level testing. (IEEE 1149 is often referred to by its older designation: JTAG - Joint Test
Action Group.)
4.8.1 Test Access Port
The test port is a standard IEEE 1149 interface, with the optional TRST pin. The Test Access Port consists of 5
pins:
TCLK: Boundary-scan Test Clock.
TDI: Test Data In; input pin clocked in on the rising edge of TCK. TDI should be pulled HIGH if bound-
ary-scan is not in use.
TDO: Test Data Out; output pin updated on the falling edge of TCK. The output is in high-impedance
except when data is actually being shifted out.
TMS: Test Mode Select; input control line clocked in on the rising edge of TCK. TMS should be pulled
HIGH if boundary-scan is not in use.
TRST: Test Reset; asynchronous, active-low, input which is used to reset the JTAG interface, and the
TAP controller. The TRST pin has an internal pull-down, and should also be pulled LOW externally
whenever boundary-scan is not in use, to ensure normal operation of the MT90500. Figure 37 below
shows a typical board-level design, including how TRST can be pulled HIGH by the test connector in
cases where the tester does not provide a TRST pin.
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