PDSP16256 Datasheet, PDF (14/28 Pages) Mitel Networks Corporation – Programmable FIR Filter

PDSP16256
SCLK
A7:0
00
01
00
01
VALID ADDR VALID ADDR
00
LOAD MASTER CONTROL LOAD FIRST COEFFICIENT
REGISTER
LOAD LAST COEFFICIENT
CCS
RES
BUSY
Fig. 15a EPROM load sequence
SCLK
A7:0
CCS
C15:12
FE
FF
00
01
00
01
FE
FF
00
01
00
01
0000
LOAD LAST
MASTER
COEFFICIENT
0001
0001
0010
LOAD SLAVE 1
CONTROL
REGISTER
LOAD SLAVE 1
COEFFICIENTS
LOAD LAST
SLAVE 1
COEFFICIENT
Fig. 15b EPROM load sequence for a cascaded system
LOAD SLAVE 2
CONTROL
REGISTER
Figure. 15 EPROM load sequence timing diagrams
LOAD SLAVE 2
COEFFICIENTS
EPROM _{ LSB}

ADDRESS 

 MSB
DATA
PDSP16256
C11:8
A7:0
CS
CCS
MASTER EPROM
C15:12
C7:0
BYTE
WEN
(2 SLAVES)
0010
GND
GND
GND
PDSP16256
C11:8
A7:0
CS
CCS
SLAVE 1 EPROM
C15:12
C7:0
BYTE
WEN
0001
GND
V_DD
GND
PDSP16256
C11:8
A7:0
CS
CCS
SLAVE 2 EPROM
C15:12
C7:0
BYTE
WEN
0010
GND
V_DD
GND
Figure. 16 Three device auto EPROM load
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