MYX29GL01GS11DPIV2 Datasheet, PDF (10/68 Pages) Micross Components – Tin-lead ball metallurgy

2.6.3
2.6.4
2.6.5
3
3.1
3.1.1
1Gb GL-S MirrorBit^® Eclipse^™
Flash Memory
MYX29GL01GS11DPIV2*
*Advanced information. Subject to change without notice.
compatibility. If the bit is 0 the sector is protected against programming and erase operations. If the bit is 1 the
sector is not protected by the PPB. The sector may be protected by other features of ASP.
PPB LOCK ASO
The PPB Lock ASO contains a single bit of volatile memory. The bit controls whether the bits in the PPB ASO
may be programmed or erased. If the bit is 0 the PPB ASO is protected against programming and erase
operations. If the bit is 1 the PPB ASO is not protected. When the PPB Lock ASO is entered the PPB Lock
bit appears in the Least Significant Bit (LSB) of each address in the device address space. However, it is
recommended to read or program the PPB Lock only at address 0 of the device for future compatibility.
Password ASO
The Password ASO contains four words of OTP memory. When the ASO is entered the Password appears
starting at address 0 in the device address space. All locations above the forth word are undefined.
Dynamic Protection Bits (DYB) ASO
The DYB ASO contains one bit of a volatile memory array for each Sector in the device. When the DYB ASO
is entered, the DYB bit for a sector appears in the Least Significant Bit (LSB) of each address in the sector.
Reading any address in a sector displays data where the LSB indicates the non-volatile protection status for
that sector. However, it is recommended to read, set, or clear the DYB only at address 0 of the sector for future
compatibility. If the bit is 0 the sector is protected against programming and erase operations. If the bit is 1 the
sector is not protected by the DYB. The sector may be protected by other features of ASP.
Data Protection
The device offers several features to prevent malicious or accidental modification of any sector via
hardware means.
Device Protection Methods
Power-Up Write Inhibit
RESET#, CE#, WE#, and, OE# are ignored during Power-On Reset (POR). During POR, the device can not be
selected, will not accept commands on the rising edge of WE#, and does not drive outputs. The Host Interface
Controller (HIC) and Embedded Algorithm Controller (EAC) are reset to their standby states, ready for reading
array data, during POR. CE# or OE# must go to V_IH before the end of POR (t_VCS).
MYX29GL01GS11DPIV2
Revision 1.0 - 01/26/2015
10
Form #: CSI-D-685 Document 001