APA600-PQ208I Datasheet, PDF (55/178 Pages) Microsemi Corporation – ProASICPLUS Flash Family FPGAs

Table 2-33 • Worst-Case Military Conditions
V_DDP = 3.0V, V_DD = 2.3V, 35 pF load, T_J = 125°C for Military/MIL-STD-883
Macro Type Description
OB33PL
3.3V, High Output Current, Low Slew Rate
OB33LH
3.3V, Low Output Current, High Slew Rate
OB33LN
3.3V, Low Output Current, Nominal Slew Rate
OB33LL
3.3V, Low Output Current, Low Slew Rate
Notes:
1. t_DLH = Data-to-Pad High
2. t_DHL = Data-to-Pad Low
Table 2-34 • Worst-Case Military Conditions
V_DDP = 2.3 V, V_DD = 2.3V, 35 pF load, T_J = 125°C for Military/MIL-STD-883
Macro Type
OB25LPHH
OB25LPHN
OB25LPHL
OB25LPLH
OB25LPLN
OB25LPLL
Description
2.5V, Low Power, High Output Current, High Slew Rate³
2.5V, Low Power, High Output Current, Nominal Slew Rate³
2.5V, Low Power, High Output Current, Low Slew Rate³
2.5V, Low Power, Low Output Current, High Slew Rate³
2.5V, Low Power, Low Output Current, Nominal Slew Rate³
2.5V, Low Power, Low Output Current, Low Slew Rate³
Notes:
1. t_DLH = Data-to-Pad High
2. t_DHL = Data-to-Pad Low
3. Low power I/O work with V_DDP = 2.5 V ±10% only. V_DDP = 2.3 V for delays.
ProASIC^PLUS Flash Family FPGAs
Max.
t_DLH1
Std.
2.7
2.7
3.3
3.3
Max.
t_DHL2
Std.
3.5
4.3
4.7
6.1
Units
ns
ns
ns
ns
Max.
t_DLH1
Std.
2.3
2.7
3.2
3.0
3.9
4.3
Max.
t_DHL2
Std.
2.4
3.3
3.5
5.0
4.6
5.7
Units
ns
ns
ns
ns
ns
ns
v5.9
2-45