APA600-PQ208I Datasheet, PDF (26/178 Pages) Microsemi Corporation – ProASICPLUS Flash Family FPGAs

ProASIC^PLUS Flash Family FPGAs
Off-Chip
On-Chip
/1
Global MUX B
OUT
÷n
180°
133 MHz
PLL Core
÷u
÷m
0°
/1
D
GL
B
External
D
Feedback
Global MUX A
OUT
D
133 MHz
÷v
D
GL
A
Reference
Clock
Q ^SET D
Q
CLR
Figure 2-17 • Using the PLL for Clock Deskewing
2-16
v5.9