MT46V16M16CV-6ITK Datasheet, PDF (9/91 Pages) Micron Technology – 256Mb: x4, x8, x16 DDR SDRAM Features

256Mb: x4, x8, x16 DDR SDRAM
Functional Block Diagrams
Functional Block Diagrams
The 256Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory
containing 268,435,456 bits. It is internally configured as a 4-bank DRAM.
Figure 1: 64 Meg x 4 Functional Block Diagram
CKE
CK#
CK
CS#
WE#
CAS#
RAS#
Control
logic
Bank 3
Bank 2
Bank 1
Mode registers
15
A[12:0],
BA[1:0]
15 ^Address
register
Refresh
counter
13
Row-
13
address
MUX
13
Bank 0
row-
address ₈₁₉₂
latch
and
decoder
Bank 0
memory
array
(8192 x 1024 x 8)
Sense amplifiers
8192
2
Bank
control
2
logic
Column-
11
address
10
counter/
latch
1
I/O gating
DM mask logic
1024
(x8)
Column
decoder
CK
4
8
READ
MUX
latch 4
Data
DLL
4
DQS
generator
Drivers
1
Column 0
DQS
Input
8
registers
1
Mask
1
1
WRITE
1
8
FIFO
2
and
drivers
4
8
1
4
4
Rcvrs
CK CK
4
4
out in Data
CK
1
Column 0
DQ[3:0]
DQS
DM
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
256Mb_DDR_x4x8x16_D2.fm - 256Mb DDR: Rev. S, Core DDR: Rev. E 9/12 EN
9
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