MT48LC64M4A2_12 Datasheet, PDF (65/86 Pages) Micron Technology – SDR SDRAM

256Mb: x4, x8, x16 SDRAM
WRITE Operation
Figure 38: WRITE – Continuous Page Burst
T0
CLK
T1
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
Command
ACTIVE
NOP
T2
tCK
WRITE
DQM
tCMS tCMH
T3
NOP
T4
NOP
T5
( ( ^{Tn + 1}
))
((
))
((
))
((
))
((
NOP
))
((
))
NOP
((
))
((
))
Tn + 2
Tn + 3
BURST TERM
NOP
Address
tAS tAH
Row
tAS tAH
A10
Row
BA0, BA1
tAS tAH
Bank
DQ
tRCD
Column m
Bank
tDS tDH
D_IN
tDS tDH
D_IN
((
))
((
))
((
))
((
))
((
))
((
))
tDS tDH
D_IN
tDS tDH
((
D_IN
))
((
))
tDS tDH
D_IN
All locations within same row
Full-page burst
does not self-terminate.
Use BURST TERMINATE
command to stop.1, ²
Full page completed
Don’t Care
Notes: 1. ^tWR must be satisfied prior to issuing a PRECHARGE command.
2. Page left open; no ^tRP.
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. R 10/12 EN
65
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