MT48LC64M4A2_12 Datasheet, PDF (1/86 Pages) Micron Technology – SDR SDRAM

SDR SDRAM
MT48LC64M4A2 – 16 Meg x 4 x 4 banks
MT48LC32M8A2 – 8 Meg x 8 x 4 banks
MT48LC16M16A2 – 4 Meg x 16 x 4 banks
256Mb: x4, x8, x16 SDRAM
Features
Features
• PC100- and PC133-compliant
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal, pipelined operation; column address can
be changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto precharge, includes concurrent auto precharge
and auto refresh modes
• Self refresh mode (not available on AT devices)
• Auto refresh
– 64ms, 8192-cycle refresh (commercial and
industrial)
– 16ms, 8192-cycle refresh (automotive)
• LVTTL-compatible inputs and outputs
• Single 3.3V ±0.3V power supply
Options
• Configurations
– 64 Meg x 4 (16 Meg x 4 x 4 banks)
– 32 Meg x 8 (8 Meg x 8 x 4 banks)
– 16 Meg x 16 (4 Meg x 16 x 4 banks)
• Write recovery (^tWR)
– ^tWR = 2 CLK
• Plastic package – OCPL¹
– 54-pin TSOP II OCPL¹ (400 mil)
(standard)
– 54-pin TSOP II OCPL¹ (400 mil)
Pb-free
Marking
64M4
32M8
16M16
A2
TG
P
Options
Marking
– 60-ball FBGA (x4, x8) (8mm x 16mm)
FB
– 60-ball FBGA (x4, x8) (8mm x 16mm)
BB
Pb-free
– 54-ball VFBGA (x16) (8mm x 14 mm)
FG²
– 54-ball VFBGA (x16) (8mm x 14 mm)
BG²
Pb-free
– 54-ball VFBGA (x16) (8mm x 8 mm)
F4³
– 54-ball VFBGA (x16) (8mm x 8 mm)
B4³
Pb-free
• Timing – cycle time
– 6ns @ CL = 3 (x8, x16 only)
-6A
– 7.5ns @ CL = 3 (PC133)
-75²
– 7.5ns @ CL = 2 (PC133)
-7E
• Self refresh
– Standard
– Low power
None
L², ⁴
• Operating temperature range
– Commercial (0˚C to +70˚C)
None
– Industrial (–40˚C to +85˚C)
IT
– Automotive (–40˚C to +105˚C)
AT⁴
• Revision
:D/:G
Notes:
1. Off-center parting line.
2. Only available on Revision D.
3. Only available on Revision G.
4. Contact Micron for availability.
Table 1: Key Timing Parameters
CL = CAS (READ) latency
Clock
Speed Grade
Frequency (MHz)
-6A
167
-75
133
-7E
133
Target ^tRCD-^tRP-CL
3-3-3
3-3-3
2-2-2
t_{RCD (ns)}
18
20
15
t_{RP (ns)}
18
20
15
CL (ns)
18
20
15
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. R 10/12 EN
1
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© 1999 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.