MT48LC16M16A2P-75DTR Datasheet, PDF (25/86 Pages) Micron Technology – SDR SDRAM MT48LC64M4A2 – 16 Meg x 4 x 4 banks MT48LC32M8A2 – 8 Meg x 8 x 4 banks MT48LC16M16A2 – 4 Meg x 16 x 4 banks

256Mb: x4, x8, x16 SDRAM
Electrical Specifications – I_DD Parameters
Electrical Specifications – I_DD Parameters
Table 10: I_DD Specifications and Conditions (x4, x8, x16) Revision D
Notes 1–5 apply to all parameters and conditions; V_DD/V_DDQ = +3.3V ±0.3V
Parameter/Condition
Symbol -6A
Operating current: Active mode; Burst = 2; READ or WRITE; ^tRC I_DD1
135
= ^tRC (MIN)
Standby current: Power-down mode; All banks idle; CKE =
LOW
I_DD2
2
Standby current: Active mode; CKE = HIGH; CS# = HIGH; All
I_DD3
40
banks active after ^tRCD met; No accesses in progress
Operating current: Burst mode; Page burst; READ or WRITE;
I_DD4
135
All banks active
Auto refresh current: CKE = HIGH; CS# = ^tRFC = ^tRFC (MIN)
I_DD5
285
HIGH
t_{RFC = 7.813μs}
I_DD6
3.5
t_{RFC = 1.953μs (AT)}
I_DD6
8
Self refresh current: CKE ≤ 0.2V
Standard
I_DD7
2.5
Low power (L)
I_DD7
–
Max
-7E
135
2
40
135
285
3.5
8
2.5
1.5
-75
Unit Notes
125
mA 6, 7, 8,
9
2
mA
9
40
mA 6, 8, 9,
10
135
mA 6, 7, 8,
9
270
mA 6, 7, 8,
3.5
mA ^{9, 10,}
8
mA
11
2.5
mA
1.5
mA 12
Table 11: I_DD Specifications and Conditions (x4, x8, x16) Revision G
Notes 1–5 apply to all parameters and conditions; V_DD/V_DDQ = +3.3V ±0.3V
Parameter/Condition
Operating current: Active mode; Burst = 2; READ or WRITE; ^tRC = ^tRC
(MIN)
Standby current: Power-down mode; All banks idle; CKE = LOW
Standby current: Active mode; CKE = HIGH; CS# = HIGH; All banks ac-
tive after ^tRCD met; No accesses in progress
Operating current: Burst mode; Page burst; READ or WRITE; All
banks active
Auto refresh current: CKE = HIGH; CS# = HIGH ^tRFC = ^tRFC (MIN)
t_{RFC = 7.813μs}
t_{RFC = 1.953μs (AT)}
Self refresh current: CKE ≤ 0.2V
Standard
Low power (L)
Symbol
I_DD1
I_DD2
I_DD3
I_DD4
I_DD5
I_DD6
I_DD6
I_DD7
I_DD7
Max
-6A
-7E
100
100
2.5
2.5
35
35
100
100
150
150
4
4
8
8
3
3
1.5
1.5
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
Notes
6, 7, 8,
9
9
6, 8, 9,
10
6, 7, 8,
9
6, 7, 8,
9, 10,
11
12
Notes:
1. All voltages referenced to V_SS.
2. The minimum specifications are used only to indicate cycle time at which proper opera-
tion over the full temperature range is ensured; (0°C ≤ T_A ≤ +70°C (commercial), –40°C ≤
T_A ≤ +85°C (industrial), and –40°C ≤ T_A ≤ +105°C (automotive)).
3. An initial pause of 100μs is required after power-up, followed by two AUTO REFRESH
commands, before proper device operation is ensured. (V_DD and V_DDQ must be powered
up simultaneously. V_SS and V_SSQ must be at same potential.) The two AUTO REFRESH
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. U 05/13 EN
25
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 1999 Micron Technology, Inc. All rights reserved.