PIC16F882-I Datasheet, PDF (96/328 Pages) Microchip Technology – 28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers

PIC16F882/883/884/886/887
8.10 Comparator Voltage Reference
The comparator voltage reference module provides an
internally generated voltage reference for the compara-
tors. The following features are available:
• Independent from Comparator operation
• Two 16-level voltage ranges
• Output clamped to VSS
• Ratiometric with VDD
• Fixed Reference (0.6V)
The VRCON register (Register 8-5) controls the
voltage reference module shown in Figure 8-8.
The voltage source is selectable through both ends of
the 16 connection resistor ladder network. Bit VRSS of
the VRCON register selects either the internal or
external voltage source.
The PIC16F882/883/884/886/887 allows the CVREF
signal to be output to the RA2 pin of PORTA under
certain configurations only. For more details, see
Figure 8-9.
8.10.1 INDEPENDENT OPERATION
The comparator voltage reference is independent of
the comparator configuration. Setting the VREN bit of
the VRCON register will enable the voltage reference.
8.10.2 OUTPUT VOLTAGE SELECTION
The CVREF voltage reference has 2 ranges with 16
voltage levels in each range. Range selection is
controlled by the VRR bit of the VRCON register. The
16 levels are set with the VR<3:0> bits of the VRCON
register.
The CVREF output voltage is determined by the following
equations:
EQUATION 8-1: CVREF OUTPUT VOLTAGE
VRR = 1 (low range):
CVREF = (VR<3:0>/24) × VLADDER
VRR = 0 (high range):
CVREF = (VLADDER/4) + (VR<3:0> × VLADDER/32)
VLADDER = VDD or ([VREF+] - [VREF-]) or VREF+
The full range of VSS to VDD cannot be realized due to
the construction of the module. See Figure 8-8.
8.10.3 OUTPUT CLAMPED TO VSS
The CVREF output voltage can be set to Vss with no
power consumption by clearing the FVREN bit of the
VRCON register.
This allows the comparator to detect a zero-crossing
while not consuming additional CVREF module current.
Note:
Depending on the application, additional
components may be required for a zero
cross circuit. Reference TB3013, “Using
the ESD Parasitic Diodes on Mixed Signal
Microcontrollers” (DS93013), for more
information.
8.10.4 OUTPUT RATIOMETRIC TO VDD
The comparator voltage reference is VDD derived and
therefore, the CVREF output changes with fluctuations in
VDD. The tested absolute accuracy of the Comparator
Voltage Reference can be found in Section 17.0
“Electrical Specifications”.
8.10.5 FIXED VOLTAGE REFERENCE
The fixed voltage reference is independent of VDD, with
a nominal output voltage of 0.6V. This reference can be
enabled by setting the FVREN bit of the SRCON
register to ‘1’. This reference is always enabled when
the HFINTOSC oscillator is active.
8.10.6 FIXED VOLTAGE REFERENCE
STABILIZATION PERIOD
When the fixed voltage reference module is enabled, it
will require some time for the reference and its amplifier
circuits to stabilize. The user program must include a
small delay routine to allow the module to settle. See
Section 17.0 “Electrical Specifications” for the
minimum delay requirement.
8.10.7 VOLTAGE REFERENCE
SELECTION
Multiplexers on the output of the voltage reference
module enable selection of either the CVREF or fixed
voltage reference for use by the comparators.
Setting the C1RSEL bit of the CM2CON1 register
enables current to flow in the CVREF voltage divider
and selects the CVREF voltage for use by C1. Clearing
the C1RSEL bit selects the fixed voltage for use by C1.
Setting the C2RSEL bit of the CM2CON1 register
enables current to flow in the CVREF voltage divider
and selects the CVREF voltage for use by C2. Clearing
the C2RSEL bit selects the fixed voltage for use by C2.
When both the C1RSEL and C2RSEL bits are cleared,
current flow in the CVREF voltage divider is disabled
minimizing the power drain of the voltage reference
peripheral.
DS41291F-page 94
© 2009 Microchip Technology Inc.