PIC16F882-I Datasheet, PDF (151/328 Pages) Microchip Technology – 28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers

PIC16F882/883/884/886/887
TABLE 11-6: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
CCP1CON P1M1
P1M0
DC1B1
DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000 0000 0000
CCP2CON
—
—
DC2B1
DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000
CCPR1L Capture/Compare/PWM Register 1 Low Byte (LSB)
xxxx xxxx xxxx xxxx
CCPR1H Capture/Compare/PWM Register 1 High Byte (MSB)
xxxx xxxx xxxx xxxx
CCPR2L Capture/Compare/PWM Register 2 Low Byte (LSB)
xxxx xxxx xxxx xxxx
CCPR2H Capture/Compare/PWM Register 2 High Byte (MSB)
xxxx xxxx xxxx xxxx
CM2CON1 MC1OUT MC2OUT C1RSEL C2RSEL
—
—
T1GSS C2SYNC 0000 --10 0000 --10
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000x
PIE1
—
ADIE
RCIE
TXIE
SSPIE
CCP1IE TMR2IE TMR1IE -000 0000 -000 0000
PIE2
OSFIE
C2IE
C1IE
EEIE
BCLIE ULPWUIE
—
CCP2IE 0000 00-0 0000 00-0
PIR1
—
ADIF
RCIF
TXIF
SSPIF
CCP1IF TMR2IF TMR1IF -000 0000 -000 0000
PIR2
OSFIF
C2IF
C1IF
EEIF
BCLIF ULPWUIF
—
CCP2IF 0000 00-0 0000 00-0
T1CON
T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 0000 0000
TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx xxxx xxxx
TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx xxxx xxxx
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 1111 1111 1111 1111
Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Capture and
Compare.
TABLE 11-7: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
CCP1CON P1M1
P1M0
DC1B1
DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000 0000 0000
CCP2CON
—
—
DC2B1
DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000
ECCPAS ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1 PSSBD0 0000 0000 0000 0000
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000x
PR2
Timer2 Period Register
1111 1111 1111 1111
PSTRCON
—
—
—
STRSYNC STRD
STRC
STRB
STRA ---0 0001 ---0 0001
PWM1CON PRSEN
PDC6
PDC5
PDC4
PDC3
PDC2
PDC1
PDC0 0000 0000 0000 0000
T2CON
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
TMR2
Timer2 Module Register
0000 0000 0000 0000
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 1111 1111
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 1111 1111 1111 1111
TRISD
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 1111 1111 1111 1111
Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the PWM.
© 2009 Microchip Technology Inc.
DS41291F-page 149