PIC16F684_07 Datasheet, PDF (77/192 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F684
10.0 DATA EEPROM MEMORY
The EEPROM data memory is readable and writable
during normal operation (full VDD range). This memory
is not directly mapped in the register file space.
Instead, it is indirectly addressed through the Special
Function Registers. There are four SFRs used to read
and write this memory:
• EECON1
• EECON2 (not a physically implemented register)
• EEDAT
• EEADR
EEDAT holds the 8-bit data for read/write, and EEADR
holds the address of the EEPROM location being
accessed. PIC16F684 has 256 bytes of data EEPROM
with an address range from 0h to FFh.
The EEPROM data memory allows byte read and write.
A byte write automatically erases the location and
writes the new data (erase before write). The EEPROM
data memory is rated for high erase/write cycles. The
write time is controlled by an on-chip timer. The write
time will vary with voltage and temperature as well as
from chip-to-chip. Please refer to AC Specifications in
Section 15.0 “Electrical Specifications” for exact
limits.
When the data memory is code-protected, the CPU
may continue to read and write the data EEPROM
memory. The device programmer can no longer access
the data EEPROM data and will read zeroes.
REGISTER 10-1: EEDAT: EEPROM DATA REGISTER
R/W-0
EEDAT7
bit 7
R/W-0
EEDAT6
R/W-0
EEDAT5
R/W-0
EEDAT4
R/W-0
EEDAT3
R/W-0
EEDAT2
R/W-0
EEDAT1
R/W-0
EEDAT0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EEDATn: Byte Value to Write To or Read From Data EEPROM bits
REGISTER 10-2: EEADR: EEPROM ADDRESS REGISTER
R/W-0
EEADR7
bit 7
R/W-0
EEADR6
R/W-0
EEADR5
R/W-0
EEADR4
R/W-0
EEADR3
R/W-0
EEADR2
R/W-0
EEADR1
R/W-0
EEADR0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EEADR: Specifies One of 256 Locations for EEPROM Read/Write Operation bits
© 2007 Microchip Technology Inc.
DS41202F-page 75