PIC16F684_07 Datasheet, PDF (22/192 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F684
3.2 Oscillator Control
The Oscillator Control (OSCCON) register (Figure 3-1)
controls the system clock and frequency selection
options. The OSCCON register contains the following
bits:
• Frequency selection bits (IRCF)
• Frequency Status bits (HTS, LTS)
• System clock control bits (OSTS, SCS)
REGISTER 3-1: OSCCON: OSCILLATOR CONTROL REGISTER
U-0
—
bit 7
R/W-1
IRCF2
R/W-1
IRCF1
R/W-0
IRCF0
R-1
OSTS⁽¹⁾
R-0
HTS
R-0
R/W-0
LTS
SCS
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
IRCF<2:0>: Internal Oscillator Frequency Select bits
111 =8 MHz
110 =4 MHz (default)
101 =2 MHz
100 =1 MHz
011 =500 kHz
010 =250 kHz
001 =125 kHz
000 =31 kHz (LFINTOSC)
OSTS: Oscillator Start-up Time-out Status bit⁽¹⁾
1 = Device is running from the external clock defined by FOSC<2:0> of the CONFIG register
0 = Device is running from the internal oscillator (HFINTOSC or LFINTOSC)
HTS: HFINTOSC Status bit (High Frequency – 8 MHz to 125 kHz)
1 = HFINTOSC is stable
0 = HFINTOSC is not stable
LTS: LFINTOSC Stable bit (Low Frequency – 31 kHz)
1 = LFINTOSC is stable
0 = LFINTOSC is not stable
SCS: System Clock Select bit
1 = Internal oscillator is used for system clock
0 = Clock source defined by FOSC<2:0> of the CONFIG register
Note 1: Bit resets to ‘0’ with Two-Speed Start-up and LP, XT or HS selected as the Oscillator mode or Fail-Safe
mode is enabled.
DS41202F-page 20
© 2007 Microchip Technology Inc.