LAN8710A Datasheet, PDF (72/82 Pages) SMSC Corporation – Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology

Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR^® Technology
Datasheet
5.5.3
Power-On nRST & Configuration Strap Timing
This diagram illustrates the nRST reset and configuration strap timing requirements in relation to
power-on. A hardware reset (nRST assertion) is required following power-up. For proper operation,
nRST must be asserted for no less than t_rstia. The nRST pin can be asserted at any time, but must
not be deasserted before t_purstd after all external power supplies have reached 80% of their nominal
operating levels. In order for valid configuration strap values to be read at power-up, the t_css and t_csh
timing constraints must be followed. Refer to Section 3.8.5, "Resets," on page 41 for additional
information.
All External
80%
Power Supplies
nRST
t_purstv
t_purstd
t_rstia
Configuration Strap
Pins Input
Configuration Strap
Pins Output Drive
t_css
t_csh
t_otaa
t_odad
Figure 5.3 Power-On nRST & Configuration Strap Timing
SYMBOL
t_purstd
t_purstv
t_rstia
t_css
t_csh
t_otaa
t_odad
Table 5.7 Power-On nRST & Configuration Strap Timing Values
DESCRIPTION
MIN
TYP
MAX
External power supplies at 80% to nRST deassertion 25
External power supplies at 80% to nRST valid
0
nRST input assertion time
100
Configuration strap pins setup to nRST deassertion
200
Configuration strap pins hold after nRST deassertion
1
Output tri-state after nRST assertion
Output drive after nRST deassertion
2
50
800
(Note 5.14)
UNITS
mS
nS
μS
nS
nS
nS
nS
Note: nRST deassertion must be monotonic.
Note: Device configuration straps are latched as a result of nRST assertion. Refer to Section 3.7,
"Configuration Straps," on page 36 for details. Configuration straps must only be pulled high or
low and must not be driven as inputs.
Note 5.14 20 clock cycles for 25MHz, or 40 clock cycles for 50MHz.
Revision 1.4 (08-23-12)
72
DATASHEET
SMSC LAN8710A/LAN8710Ai