PIC16F887I-PT Datasheet, PDF (58/338 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers

PIC16F882/883/884/886/887
3.5.7 RC6/TX/CK
Figure 3-17 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• an asynchronous serial output
• a synchronous clock I/O
FIGURE 3-17:
BLOCK DIAGRAM OF RC6
SPEN
TXEN
Data Bus
WR
PORTC
D
CK
SYNC
EUSART
CK ₀₁
EUSART
TX ₁₀
Q
01
Q
10
WR
TRISC
DQ
CK _Q
VDD
I/O Pin
VSS
RD
TRISC
RD
PORTC
3.5.8 RC7/RX/DT
Figure 3-18 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• an asynchronous serial input
• a synchronous serial data I/O
FIGURE 3-18:
Data Bus
BLOCK DIAGRAM OF RC7
SPEN
SYNC
DQ
WR
PORTC
CK _Q
WR
TRISC
DQ
CK _Q
EUSART
DT
01
10
RD
TRISC
RD
PORTC
EUSART RX/DT
VDD
I/O Pin
VSS
TABLE 3-3: SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
CCP1CON P1M1 P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0
128
CCP2CON —
—
DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0
129
PORTC
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
55
PSTRCON —
—
— STRSYNC STRD STRC STRB STRA
150
RCSTA
SPEN RX9
SREN
CREN ADDEN FERR OERR RX9D
165
SSPCON WCOL SSPOV SSPEN
CKP
SSPM3 SSPM2 SSPM1 SSPM0
185
T1CON T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
84
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
55
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by
PORTC.
DS41291G-page 58
 2006-2012 Microchip Technology Inc.