PL130-07 Datasheet, PDF (5/16 Pages) Microchip Technology – High Speed Translator Buffer to LVCMOS

2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
Pin Configurations
PL130-07
(Top View)
GND
CLK_IN
GND
VDD
1
8
2
7
3
6
4
5
SOIC-8L
DRV_SEL^
VDD
GND
CLK_OUT
PL130-07(A)
(Top View)
VDD
DRV_SEL
GND
OE
1
8
2
7
3
6
4
5
TSSOP-8L
CLK_OUT
VDD
DNC
CLK_IN
PL130-07(A)
(Top View)
PL130-07
DRV_SEL
GND
GND
OE
12 11 10
13
9
8
14
7
PL130-07(A)
15
6
16
5
123 4
CLK_OUT
VDD
N/C
GND
QFN-16
 2016 Microchip Technology Inc.
DS20005598A-page 5