PIC18F4680 Datasheet, PDF (476/484 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2585/2680/4585/4680
Program Verification and Code Protection ....................... 357
Associated Registers ............................................... 357
Programming, Device Instructions ................................... 361
PSP. See Parallel Slave Port.
Pulse-Width Modulation. See PWM (CCP1 Module)
and PWM (ECCP1 Module).
PUSH ............................................................................... 390
PUSH and POP Instructions .............................................. 63
PUSHL ............................................................................. 406
PWM (CCP1 Module) ....................................................... 169
Associated Registers ............................................... 171
Duty Cycle ................................................................ 169
ECCPR1H:ECCPR1L Registers .............................. 169
Example Frequencies/Resolutions .......................... 170
Period ....................................................................... 169
Setup for PWM Operation ........................................ 170
TMR2 to PR2 Match ................................................ 169
PWM (ECCP1 Module) .................................................... 175
Associated Registers ............................................... 186
Auto-Shutdown ........................................................ 170
Direction Change in Full-Bridge
Output Mode .................................................... 180
Duty Cycle ................................................................ 176
ECCPR1H:ECCPR1L Registers .............................. 175
Effects of a Reset ..................................................... 185
Enhanced PWM Auto-Shutdown ............................. 182
Example Frequencies/Resolutions .......................... 176
Full-Bridge Application Example .............................. 180
Full-Bridge Mode ...................................................... 179
Half-Bridge Mode ..................................................... 178
Half-Bridge Output Mode
Applications Example ....................................... 178
Output Configurations .............................................. 176
Output Relationships (Active-High) .......................... 177
Output Relationships (Active-Low) ........................... 177
Period ....................................................................... 175
Programmable Dead-Band Delay ............................ 182
Setup ........................................................................ 185
Start-up Considerations ........................................... 184
TMR2 to PR2 Match ................................................ 175
Q
Q Clock .................................................................... 170, 176
R
RAM. See Data Memory.
RC Oscillator ...................................................................... 25
RCIO Oscillator Mode ................................................ 25
RC_IDLE Mode .................................................................. 39
RC_RUN Mode .................................................................. 35
RCALL .............................................................................. 391
RCON Register
Bit Status During Initialization .................................... 48
Register File ....................................................................... 69
Register File Summary ................................................. 76–86
Registers
ADCON0 (A/D Control 0) ......................................... 247
ADCON1 (A/D Control 1) ......................................... 248
ADCON2 (A/D Control 2) ......................................... 249
BAUDCON (Baud Rate Control) .............................. 230
BIE0 (Buffer Interrupt Enable 0) ............................... 318
BnCON (TX/RX Buffer n Control,
Receive Mode) ................................................. 294
BnCON (TX/RX Buffer n Control,
Transmit Mode) ................................................ 295
BnDLC (TX/RX Buffer n Data Length Code
in Receive Mode) ............................................. 300
BnDLC (TX/RX Buffer n Data Length Code
in Transmit Mode) ............................................ 301
BnDm (TX/RX Buffer n Data Field Byte m
in Receive Mode) ............................................. 299
BnDm (TX/RX Buffer n Data Field Byte m
in Transmit Mode) ............................................ 299
BnEIDH (TX/RX Buffer n Extended Identifier,
High Byte in Receive Mode) ............................ 298
BnEIDH (TX/RX Buffer n Extended Identifier,
High Byte in Transmit Mode) ........................... 298
BnEIDL (TX/RX Buffer n Extended Identifier,
Low Byte in Receive Mode) ............................. 298
BnEIDL (TX/RX Buffer n Extended Identifier,
Low Byte in Transmit Mode) ............................ 299
BnSIDH (TX/RX Buffer n Standard Identifier,
High Byte in Receive Mode) ............................ 296
BnSIDH (TX/RX Buffer n Standard Identifier,
High Byte in Transmit Mode) ........................... 296
BnSIDL (TX/RX Buffer n Standard Identifier,
Low Byte in Receive Mode) ............................. 297
BnSIDL (TX/RX Buffer n Standard Identifier,
Low Byte in Transmit Mode) ............................ 297
BRGCON1 (Baud Rate Control 1) ........................... 311
BRGCON2 (Baud Rate Control 2) ........................... 312
BRGCON3 (Baud Rate Control 3) ........................... 313
BSEL0 (Buffer Select 0) ........................................... 301
CANCON (CAN Control) .......................................... 276
CANSTAT (CAN Status) .......................................... 277
CCP1CON
(Capture/Compare/PWM Control) ................... 163
CIOCON (CAN I/O Control) ..................................... 314
CMCON (Comparator Control) ................................ 257
COMSTAT (CAN Communication Status) ............... 281
CONFIG1H (Configuration 1 High) .......................... 344
CONFIG2H (Configuration 2 High) .......................... 346
CONFIG2L (Configuration 2 Low) ........................... 345
CONFIG3H (Configuration 3 High) .......................... 347
CONFIG4L (Configuration 4 Low) ........................... 347
CONFIG5H (Configuration 5 High) .......................... 348
CONFIG5L (Configuration 5 Low) ........................... 348
CONFIG6H (Configuration 6 High) .......................... 349
CONFIG6L (Configuration 6 Low) ........................... 349
CONFIG7H (Configuration 7 High) .......................... 350
CONFIG7L (Configuration 7 Low) ........................... 350
CVRCON (Comparator Voltage
Reference Control) .......................................... 263
Device ID Register 1 ................................................ 351
Device ID Register 2 ................................................ 351
ECANCON (Enhanced CAN Control) ...................... 280
ECCP1AS (ECCP1 Auto-Shutdown Control) .......... 183
ECCP1CON (Enhanced
Capture/Compare/PWM Control) .................... 173
ECCP1DEL (PWM Configuration) ........................... 182
EECON1 (Data EEPROM Control 1) ................. 97, 106
HLVDCON (HLVD Control) ...................................... 267
INTCON (Interrupt Control) ...................................... 115
INTCON2 (Interrupt Control 2) ................................. 116
INTCON3 (Interrupt Control 3) ................................. 117
IPR1 (Peripheral Interrupt Priority 1) ....................... 124
IPR2 (Peripheral Interrupt Priority 2) ....................... 125
IPR3 (Peripheral Interrupt Priority 3) ............... 126, 317
MSEL0 (Mask Select 0) ........................................... 307
MSEL1 (Mask Select 1) ........................................... 308
DS39625B-page 474
Preliminary
 2004 Microchip Technology Inc.