PIC18F4680 Datasheet, PDF (440/484 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2585/2680/4585/4680
FIGURE 27-7:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
Internal
30
POR
PWRT
Time-out
33
32
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
31
34
I/O pins
Note: Refer to Figure 27-4 for load conditions.
FIGURE 27-8:
BROWN-OUT RESET TIMING
VDD
VIRVST
Enable Internal
Reference Voltage
Internal Reference
Voltage Stable
BVDD
35
36
34
VBGAP = 1.2V
TABLE 27-10: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
30
TMCL MCLR Pulse Width (low)
2
31
TWDT Watchdog Timer Time-out Period (no
—
postscaler)
32
TOST Oscillation Start-up Timer Period
1024 TOSC
33
TPWRT Power-up Timer Period
—
34
TIOZ I/O High-Impedance from MCLR Low
—
or Watchdog Timer Reset
35
TBOR Brown-out Reset Pulse Width
200
36
TIVRST Time for Internal Reference Voltage to
—
become stable
37
TLVD High/Low-Voltage Detect Pulse Width 200
38
TCSD CPU Start-up Time
5
39
TIOBST Time for INTOSC to stabilize
—
Legend: TBD = To Be Determined
—
4.00
—
65.5
2
—
20
—
—
1
—
TBD
1024 TOSC
TBD
—
—
50
—
10
—
µs
ms
— TOSC = OSC1 period
ms
µs
µs VDD ≤ BVDD (see D005)
µs
µs VDD ≤ VLVD
µs
ms
DS39625B-page 438
Preliminary
 2004 Microchip Technology Inc.