MRF24J40_10 Datasheet, PDF (40/156 Pages) Microchip Technology – IEEE 802.15.4™ 2.4 GHz RF Transceiver

MRF24J40
REGISTER 2-31: TXPEND: TX DATA PENDING REGISTER (ADDRESS: 0x21)
R/W-1
MLIFS5
bit 7
R/W-0
MLIFS4
R/W-0
MLIFS3
R/W-0
MLIFS2
R/W-0
MLIFS1
R/W-1
MLIFS0
R/W-0
GTSSWITCH
R/W-0
FPACK⁽¹⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-2
bit 1
bit 0
MLIFS<5:0>: Minimum Long Interframe Spacing bits
The minimum number of symbols forming a Long Interframe Spacing (LIFS) period. Refer to
IEEE 802.15.4™-2003 Standard, Section 7.5.1.2 “IFS” and Table 70: MAC Sublayer Constants.
MLIFS + RFSTBL = aMinLIFSPeriod = 40 symbols.
Units: symbol period (16 μs). Default value: 0x21. Recommended values: MLIFS = 0x1F and
RFSTBL = 0x9.
GTSSWITCH: Continue TX GTS FIFO Switch in CFP bit
1 = GTS1 and GTS2 FIFO will toggle with each other during CFP
0 = GTS1 and GTS2 FIFO will stop toggling with each other if the transmission fails (default)
FPACK: Frame Pending bit in the Acknowledgement Frame bit⁽¹⁾
Sets or clears the frame pending bit in the Acknowledgement frame.
1 = Sets frame pending bit
0 = Clears frame pending bit
Note 1: Refer to IEEE 802.15.4™-2003 Standard, Section 7.2.1.1.3 “Frame Pending Subfield” and
Section 7.2.2.3.1 “Acknowledgement Frame MHR Fields”.
DS39776C-page 40
Preliminary
© 2010 Microchip Technology Inc.