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KSZ8081MNX Datasheet, PDF (36/66 Pages) Micrel Semiconductor – 10Base-T/100Base-TX Physical Layer Transceiver
KSZ8081MNX/RNB
TABLE 4-2: REGISTER DESCRIPTION (CONTINUED)
Address
Name
Description
1 = Software reset
0.15
Reset
0 = Normal operation
This bit is self-cleared after a ‘1’ is
written to it.
0.14
Loopback
1 = Loopback mode
0 = Normal operation
1 = 100 Mbps
0.13
Speed Select
0 = 10 Mbps
This bit is ignored if auto-negotiation
is enabled (Register 0.12 = 1).
1 = Enable auto-negotiation process
Auto-
0 = Disable auto-negotiation process
0.12
Negotiation If enabled, the auto-negotiation
Enable result overrides the settings in regis-
ters 0.13 and 0.8.
1 = Power-down mode
0 = Normal operation
If software reset (Register 0.15) is
used to exit power-down mode (Reg-
0.11
Power-Down
ister 0.11 = 1), two software reset
writes (Register 0.15 = 1) are
required. The first write clears
power-down mode; the second write
resets the chip and re-latches the pin
strapping pin values.
1 = Electrical isolation of PHY from
0.10
Isolate
MII/RMII
0 = Normal operation
1 = Restart auto-negotiation process
0.9
Restart Auto- 0 = Normal operation.
Negotiation This bit is self-cleared after a ‘1’ is
written to it.
Mode
RW/SC
RW
RW
RW
RW
RW
RW/SC
0.8
Duplex Mode
1 = Full-duplex
0 = Half-duplex
RW
0.7
Collision Test
1 = Enable COL test
0 = Disable COL test
RW
0.6:0
Reserved Reserved
RO
Register 1h – Basic Status
1.15
100BASE-T4
1 = T4 capable
0 = Not T4 capable
RO
1.14
100BASE-TX
Full-Duplex
1 = Capable of 100 Mbps full-duplex
0 = Not capable of 100 Mbps
full-duplex
RO
1.13
100BASE-TX
Half-Duplex
1 = Capable of 100 Mbps half-duplex
0 = Not capable of 100 Mbps
half-duplex
RO
1.12
10BASE-T
Full-Duplex
1 = Capable of 10 Mbps full-duplex
0 = Not capable of 10 Mbps full-
duplex
RO
Default
0
0
Set by the SPEED strapping pin.
See the Strap-In Options –
KSZ8081MNX section for details.
Set by the NWAYEN strapping
pin.
See the Strap-In Options –
KSZ8081MNX section for details.
0
Set by the ISO strapping pin.
See the Strap-In Options –
KSZ8081MNX section for details.
0
The inverse of the DUPLEX
strapping pin value.
See the Strap-In Options –
KSZ8081MNX section for details.
0
000_0000
0
1
1
1
DS00002202A-page 36
 2016 Microchip Technology Inc.