PIC18F2525 Datasheet, PDF (351/390 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2525/2620/4525/4620
FIGURE 26-12:
RE2/CS
PARALLEL SLAVE PORT TIMING (PIC18F4410/4510/4515/4610)
RE0/RD
RE1/WR
65
RD7:RD0
64
Note: Refer to Figure 26-5 for load conditions.
62
63
TABLE 26-13: PARALLEL SLAVE PORT REQUIREMENTS (PIC18F4525/4620)
Param.
No.
Symbol
Characteristic
Min Max Units
Conditions
62
TdtV2wrH Data In Valid before WR ↑ or CS ↑ (setup time) 20 — ns
63
TwrH2dtI WR ↑ or CS ↑ to Data–In
Invalid (hold time)
PIC18FXXXX 20 — ns
PIC18LFXXXX 35 — ns VDD = 2.0V
64
TrdL2dtV RD ↓ and CS ↓ to Data–Out Valid
— 80 ns
65
TrdH2dtI RD ↑ or CS ↓ to Data–Out Invalid
10 30 ns
66
TibfINH
Inhibit of the IBF Flag bit being Cleared from
— 3 TCY
WR ↑ or CS ↑
 2004 Microchip Technology Inc.
Preliminary
DS39626B-page 349