PIC24HJ64GP506-I Datasheet, PDF (287/292 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJXXXGPX06/X08/X10
ADxPCFGL (ADCx Port Configuration Low)............. 212
CiBUFPNT1 (ECAN Filter 0-3 Buffer Pointer)........... 188
CiBUFPNT2 (ECAN Filter 4-7 Buffer Pointer)........... 189
CiBUFPNT3 (ECAN Filter 8-11 Buffer Pointer)......... 189
CiBUFPNT4 (ECAN Filter 12-15 Buffer Pointer)....... 190
CiCFG1 (ECAN Baud Rate Configuration 1) ............ 186
CiCFG2 (ECAN Baud Rate Configuration 2) ............ 187
CiCTRL1 (ECAN Control 1) ...................................... 178
CiCTRL2 (ECAN Control 2) ...................................... 179
CiEC (ECAN Transmit/Receive Error Count)............ 185
CiFCTRL (ECAN FIFO Control)................................ 181
CiFEN1 (ECAN Acceptance Filter Enable) ............... 188
CiFIFO (ECAN FIFO Status)..................................... 182
CiFMSKSEL1 (ECAN Filter 7-0 Mask Selection)..... 192,
193
CiINTE (ECAN Interrupt Enable) .............................. 184
CiINTF (ECAN Interrupt Flag)................................... 183
CiRXFnEID (ECAN Acceptance Filter n Extended Identi-
fier).................................................................... 191
CiRXFnSID (ECAN Acceptance Filter n Standard Identi-
fier).................................................................... 191
CiRXFUL1 (ECAN Receive Buffer Full 1) ................. 195
CiRXFUL2 (ECAN Receive Buffer Full 2) ................. 195
CiRXMnEID (ECAN Acceptance Filter Mask n Extended
Identifier) ........................................................... 194
CiRXMnSID (ECAN Acceptance Filter Mask n Standard
Identifier) ........................................................... 194
CiRXOVF1 (ECAN Receive Buffer Overflow 1) ........ 196
CiRXOVF2 (ECAN Receive Buffer Overflow 2) ........ 196
CiTRBnDLC (ECAN Buffer n Data Length Control) .. 199
CiTRBnEID (ECAN Buffer n Extended Identifier) ..... 198
CiTRBnSID (ECAN Buffer n Standard Identifier) ...... 198
CiTRBnSTAT (ECAN Receive Buffer n Status) ........ 200
CiTRmnCON (ECAN TX/RX Buffer m Control)......... 197
CiVEC (ECAN Interrupt Code).................................. 180
CLKDIV (Clock Divisor)............................................. 126
CORCON (Core Control) ...................................... 23, 72
DMACS0 (DMA Controller Status 0)......................... 117
DMACS1 (DMA Controller Status 1)......................... 119
DMAxCNT (DMA Channel x Transfer Count) ........... 116
DMAxCON (DMA Channel x Control) ....................... 113
DMAxPAD (DMA Channel x Peripheral Address)..... 116
DMAxREQ (DMA Channel x IRQ Select) ................. 114
DMAxSTA (DMA Channel x RAM Start Address A) . 115
DMAxSTB (DMA Channel x RAM Start Address B) . 115
DSADR (Most Recent DMA RAM Address).............. 120
I2CxCON (I2Cx Control) ........................................... 163
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 167
I2CxSTAT (I2Cx Status) ........................................... 165
ICxCON (Input Capture x Control) ............................ 150
IEC0 (Interrupt Enable Control 0) ............................... 83
IEC1 (Interrupt Enable Control 1) ............................... 85
IEC2 (Interrupt Enable Control 2) ............................... 87
IEC3 (Interrupt Enable Control 3) ............................... 89
IEC4 (Interrupt Enable Control 4) ............................... 90
IFS0 (Interrupt Flag Status 0) ..................................... 75
IFS1 (Interrupt Flag Status 1) ..................................... 77
IFS2 (Interrupt Flag Status 2) ..................................... 79
IFS3 (Interrupt Flag Status 3) ..................................... 81
IFS4 (Interrupt Flag Status 4) ..................................... 82
INTCON1 (Interrupt Control 1).................................... 73
INTCON2 (Interrupt Control 2).................................... 74
IPC0 (Interrupt Priority Control 0) ............................... 91
IPC1 (Interrupt Priority Control 1) ............................... 92
IPC10 (Interrupt Priority Control 10) ......................... 101
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IPC11 (Interrupt Priority Control 11) ......................... 102
IPC12 (Interrupt Priority Control 12) ......................... 103
IPC13 (Interrupt Priority Control 13) ......................... 104
IPC14 (Interrupt Priority Control 14) ......................... 105
IPC15 (Interrupt Priority Control 15) ......................... 106
IPC16 (Interrupt Priority Control 16) ................. 107, 109
IPC17 (Interrupt Priority Control 17) ......................... 108
IPC2 (Interrupt Priority Control 2) ............................... 93
IPC3 (Interrupt Priority Control 3) ............................... 94
IPC4 (Interrupt Priority Control 4) ............................... 95
IPC5 (Interrupt Priority Control 5) ............................... 96
IPC6 (Interrupt Priority Control 6) ............................... 97
IPC7 (Interrupt Priority Control 7) ............................... 98
IPC8 (Interrupt Priority Control 8) ............................... 99
IPC9 (Interrupt Priority Control 9) ............................. 100
NVMCON (Flash Memory Control)............................. 59
OCxCON (Output Compare x Control) ..................... 153
OSCCON (Oscillator Control)................................... 124
OSCTUN (FRC Oscillator Tuning)............................ 128
PLLFBD (PLL Feedback Divisor) ............................. 127
PMD1 (Peripheral Module Disable Control Register 1) ..
133
PMD2 (Peripheral Module Disable Control Register 2) ..
135
PMD3 (Peripheral Module Disable Control Register 3) ..
137
RCON (Reset Control)................................................ 64
SPIxCON1 (SPIx Control 1) ..................................... 157
SPIxCON2 (SPIx Control 2) ..................................... 159
SPIxSTAT (SPIx Status and Control) ....................... 156
SR (CPU Status) .................................................. 22, 72
T1CON (Timer1 Control) .......................................... 142
TxCON (T2CON, T4CON, T6CON or T8CON Control)..
146
TyCON (T3CON, T5CON, T7CON or T9CON Control)..
147
UxMODE (UARTx Mode) ......................................... 170
UxSTA (UARTx Status and Control) ........................ 172
Reset
Clock Source Selection .............................................. 65
Special Function Register Reset States ..................... 66
Times.......................................................................... 65
Reset Sequence ................................................................. 67
Resets ................................................................................ 63
S
Serial Peripheral Interface (SPI) ....................................... 155
Software Simulator (MPLAB SIM) .................................... 230
Software Stack Pointer, Frame Pointer
CALL Stack Frame ..................................................... 50
Special Features............................................................... 213
SPI Module
SPI1 Register Map ..................................................... 37
SPI2 Register Map ..................................................... 37
Symbols Used in Opcode Descriptions ............................ 222
System Control
Register Map .............................................................. 49
T
Temperature and Voltage Specifications
AC............................................................................. 242
Timer1 .............................................................................. 141
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 143
Timing Characteristics
CLKO and I/O ........................................................... 245
Timing Diagrams
DS70175H-page 285