PIC24HJ64GP506-I Datasheet, PDF (286/292 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJXXXGPX06/X08/X10
I
I/O Ports ............................................................................ 139
Parallel I/O (PIO)....................................................... 139
Write/Read Timing .................................................... 140
I²C
Operating Modes ...................................................... 161
Registers ................................................................... 161
I²C Module
I2C1 Register Map ...................................................... 36
I2C2 Register Map ...................................................... 36
In-Circuit Debugger ........................................................... 220
In-Circuit Emulation........................................................... 213
In-Circuit Serial Programming (ICSP) ....................... 213, 220
Input Capture
Registers ................................................................... 150
Input Change Notification Module ..................................... 140
Instruction Addressing Modes............................................. 50
File Register Instructions ............................................ 50
Fundamental Modes Supported.................................. 51
MCU Instructions ........................................................ 50
Move and Accumulator Instructions ............................ 51
Other Instructions........................................................ 51
Instruction Set
Overview ................................................................... 224
Summary................................................................... 221
Instruction-Based Power-Saving Modes ........................... 131
Idle ............................................................................ 132
Sleep ......................................................................... 131
Internal RC Oscillator
Use with WDT ........................................................... 219
Internet Address................................................................ 287
Interrupt Control and Status Registers................................ 71
IECx ............................................................................ 71
IFSx............................................................................. 71
INTCON1 .................................................................... 71
INTCON2 .................................................................... 71
INTTREG .................................................................... 71
IPCx ............................................................................ 71
Interrupt Setup Procedures ............................................... 110
Initialization ............................................................... 110
Interrupt Disable........................................................ 110
Interrupt Service Routine .......................................... 110
Trap Service Routine ................................................ 110
Interrupt Vector Table (IVT) ................................................ 67
Interrupts Coincident with Power Save Instructions.......... 132
J
JTAG Boundary Scan Interface ........................................ 213
M
Memory Organization.......................................................... 25
Microchip Internet Web Site .............................................. 287
Modes of Operation
Disable ...................................................................... 177
Initialization ............................................................... 177
Listen All Messages .................................................. 177
Listen Only ................................................................ 177
Loopback .................................................................. 177
Normal Operation...................................................... 177
MPLAB ASM30 Assembler, Linker, Librarian ................... 230
MPLAB ICD 2 In-Circuit Debugger.................................... 231
MPLAB ICE 2000 High-Performance Universal In-Circuit Em-
ulator ......................................................................... 231
MPLAB Integrated Development Environment Software .. 229
MPLAB PM3 Device Programmer..................................... 231
MPLAB REAL ICE In-Circuit Emulator System................. 231
DS70175H-page 284
MPLINK Object Linker/MPLIB Object Librarian ................ 230
Multi-Bit Data Shifter........................................................... 24
N
NVM Module
Register Map .............................................................. 49
O
Open-Drain Configuration................................................. 140
Output Compare ............................................................... 151
P
Packaging ......................................................................... 269
Details....................................................................... 270
Marking ..................................................................... 269
Peripheral Module Disable (PMD) .................................... 132
PICSTART Plus Development Programmer..................... 232
Pinout I/O Descriptions (table)............................................ 13
PMD Module
Register Map .............................................................. 49
POR and Long Oscillator Start-up Times ........................... 66
PORTA
Register Map .............................................................. 47
PORTB
Register Map .............................................................. 47
PORTC
Register Map .............................................................. 47
PORTD
Register Map .............................................................. 47
PORTE
Register Map .............................................................. 48
PORTF
Register Map .............................................................. 48
PORTG
Register Map .............................................................. 48
Power-Saving Features .................................................... 131
Clock Frequency and Switching ............................... 131
Program Address Space..................................................... 25
Construction ............................................................... 52
Data Access from Program Memory Using Program
Space Visibility ................................................... 55
Data Access from Program Memory Using Table Instruc-
tions .................................................................... 54
Data Access from, Address Generation ..................... 53
Memory Map............................................................... 25
Table Read Instructions
TBLRDH ............................................................. 54
TBLRDL.............................................................. 54
Visibility Operation ...................................................... 55
Program Memory
Interrupt Vector ........................................................... 26
Organization ............................................................... 26
Reset Vector ............................................................... 26
R
Reader Response............................................................. 288
Registers
ADxCHS0 (ADCx Input Channel 0 Select ................ 210
ADxCHS123 (ADCx Input Channel 1, 2, 3 Select) ... 209
ADxCON1 (ADCx Control 1)..................................... 204
ADxCON2 (ADCx Control 2)..................................... 206
ADxCON3 (ADCx Control 3)..................................... 207
ADxCON4 (ADCx Control 4)..................................... 208
ADxCSSH (ADCx Input Scan Select High)............... 211
ADxCSSL (ADCx Input Scan Select Low) ................ 211
ADxPCFGH (ADCx Port Configuration High) ........... 212
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