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PIC24HJ64GP506-I Datasheet, PDF (280/292 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers | |||
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PIC24HJXXXGPX06/X08/X10
Revision G (March 2008)
This revision includes minor typographical and
formatting changes throughout the data sheet text.
The major changes are referenced by their respective
section in the following table.
TABLE A-1: MAJOR SECTION UPDATES
Section Name
Update Description
Section 3.0 âMemory Organizationâ
Updated Change Notification Register Map table title to reflect
application with PIC24HJXXXGPX10 devices (Table 3-2).
Added Change Notification Register Map tables (Table 3-3 and
Table 3-4) for PIC24HJXXXGPX08 and PIC24HJXXXGPX06
devices, respectively.
Updated the bit range for AD1CON3 (ADCS<7:0>) in the ADC1
Register Map and added Note 1 (Table 3-15).
Updated the bit range for AD2CON3 (ADCS<7:0>) in the ADC2
Register Map (Table 3-16).
Updated the title in the ECAN1 Register Map When C1CTRL1.WIN
= 0 or 1 to reflect applicable devices (Table 3-18).
Updated the title in the ECAN1 Register Map When C1CTRL1.WIN
= 0 to reflect applicable devices (Table 3-19).
Updated the title in the ECAN1 Register Map When C1CTRL1.WIN
= 1 to reflect applicable devices (Table 3-20).
Updated the Reset value for C2FEN1 (FFFF) in the ECAN2 Register
Map When C2CTRL1.WIN = 0 or 1 (Table 3-21) and updated the
title to reflect applicable device.
Updated the title for the ECAN2 Register Map When C2CTRL1.WIN
= 0 to reflect applicable device (Table 3-22).
Updated the title for the ECAN2 Register Map When C2CTRL1.WIN
= 1 to reflect applicable device (Table 3-23).
Updated Reset value for TRISA (F6FF) in the PORTA Register Map
(Table 3-24).
Section 5.0 âResetâ
Added POR and BOR references in Reset Flag Bit Operation
(Table 5-1).
Section 7.0 âDirect Memory Access (DMA)â Updated the table cross-reference for Note 2 in the DMAxREQ
register (Register 7-2).
Section 8.0 âOscillator Configurationâ
Updated the third clock source item (External Clock) in
Section 8.1.1 âSystem Clock Sourcesâ.
Section 15.0 âSerial Peripheral Interface
(SPI)â
Section 16.0 âInter-Integrated Circuitâ¢
(I2Câ¢)â
Removed redundant information, which is now available in the
related section in the âPIC24H Family Reference Manualâ, while
retaining the SPI Module Block Diagram (Figure 15-1).
Removed sections 16.3 through 16.13, while retaining the I2C Block
Diagram (Figure 16-1) (redundant information, which is now
available in the related section in the âPIC24H Family Reference
Manualâ).
Section 17.0 âUniversal Asynchronous
Receiver Transmitter (UART)â
Removed sections 17.1 through 17.7 (redundant information, which
is now available in the related section in the âPIC24H Family
Reference Manualâ).
DS70175H-page 278
© 2009 Microchip Technology Inc.
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