EQCO62R20.3 Datasheet, PDF (27/34 Pages) Microchip Technology – EQCO62R20.3 6.25 Gbps Asymmetric Coax Equalizer

EQCO62R20.3/EQCO31R20.3
Component
L1
C8 (50V)
C5
Footprint
1812
0603
0402
X
4.5
-0.725
-0.125
Y
-7.6
-8.425
-7.175
TABLE E-2:
VIA
1
2
3
4
5
6
7
8
VIA POSITIONS OF Figure 2-4
Thermal
X
—
—
Not Isolated
Not Isolated
—
Isolated
Isolated
Not Isolated
4.1
4.825
-1.725
1.7
-2.9
1.65
1.575
2.375
Angle
90°
—
—
Bottom
Bottom
Bottom
Y
-4.1
-4.1
-5.975
-6.425
-7.025
-9.9
-9.7
-10.175
Connected To
Top-Bottom
Top-Bottom
Top-GND-Bottom
Top-Power-Bottom
Top-Bottom
Top-GND-Bottom
Top-GND
Top-Power
TABLE E-3: GROUND AND VCC PLANE POSITION OF Figure 2-4
GND Plane Coordinates
X
Y
VCC Plane Coordinates
X
Y
A
-2.475
-9.1
N
B
-2.475
-3.1
O
C
-1.25
-3.1
P
D
-1.25
-6.125
Q
E
-0.475
-6.9
R
F
0.85
-6.9
S
G
0.85
-5.975
H
1.05
-5.775
I
1.05
-3.1
J
-2.475
-3.1
K
2.475
-9.1
L
-0.9
-9.075
T
M
0.75
-10.725 U
-2.475
-2.475
0.75
0.75
2.475
2.475
-9.125
-6.875
-6.875
-6.05
-6.05
-9.125
-0.9
0.75
-9.075
-10.725
FIGURE E-3: TRACK DIMENSIONS OF Figure 2-4
Track
Width
Note 1:
1
0.3
QFN.1 to Tab (GND)
2
0.4
QFN.1 to C10 (GND)
3
0.3
QFN.2 (SDIp)
4
0.2
QFN.3 (SDIn)
5
0.3
QFN.4 (GND)
6
0.2
QFN.5 (LFin)
7
0.2
QFN.6 (ampR)
8
0.2
QFN.7 (riseR)
9
0.3
QFN.9 (GND)
10
100Ω Diff.⁽¹⁾
QFN.10-11 (SDIp-SDIn)
11
0.3
QFN.12 to V8/Tab (GND)
Width and spaces between lines needs to be calculated based on PCB layer stack. Impedance should be
100Ω differential.
 2012-2016 Microchip Technology Inc.
DS60001302B-page 27