DSPIC30F6011_06 Datasheet, PDF (223/228 Pages) Microchip Technology – High-Performance, 16-Bit Digital Signal Controllers

dsPIC30F6011A/6012A/6013A/6014A
S
Serial Peripheral Interface. See SPI.
Simple Capture Event Mode ............................................... 83
Buffer Operation.......................................................... 84
Hall Sensor Mode ....................................................... 84
Prescaler..................................................................... 83
Timer2 and Timer3 Selection Mode............................ 84
Simple OC/PWM Mode Timing Requirements.................. 192
Simple Output Compare Match Mode................................. 88
Simple PWM Mode ............................................................. 88
Input Pin Fault Protection............................................ 88
Period.......................................................................... 89
Software Simulator (MPLAB SIM)..................................... 170
Software Stack Pointer, Frame Pointer............................... 16
Call Stack Frame ........................................................ 35
SPI ...................................................................................... 91
SPI Module ......................................................................... 91
Framed SPI Support ................................................... 91
Operating Function Description .................................. 91
Operation During CPU Idle Mode ............................... 93
Operation During CPU Sleep Mode............................ 93
SDOx Disable ............................................................. 91
Slave Select Synchronization ..................................... 93
SPI1 Register Map...................................................... 94
SPI2 Register Map...................................................... 94
Timing Characteristics
Master Mode (CKE = 0) .................................... 196
Master Mode (CKE = 1) .................................... 197
Slave Mode (CKE = 1) .............................. 198, 200
Timing Requirements
Master Mode (CKE = 0) .................................... 196
Master Mode (CKE = 1) .................................... 198
Slave Mode (CKE = 0) ...................................... 199
Slave Mode (CKE = 1) ...................................... 200
Word and Byte Communication .................................. 91
Status Bits, Their Significance and the Initialization
Condition for RCON Register, Case 1 ...................... 154
Status Bits, Their Significance and the Initialization
Condition for RCON Register, Case 2 ...................... 155
Status Register ................................................................... 16
Symbols Used in Opcode Descriptions............................. 162
System Integration ............................................................ 145
Register Map............................................................. 159
T
Table Instruction Operation Summary ................................ 51
Temperature and Voltage Specifications
AC ............................................................................. 182
Timer1 Module .................................................................... 69
16-bit Asynchronous Counter Mode ........................... 69
16-bit Synchronous Counter Mode ............................. 69
16-bit Timer Mode....................................................... 69
Gate Operation ........................................................... 70
Interrupt....................................................................... 71
Operation During Sleep Mode .................................... 70
Prescaler..................................................................... 70
Real-Time Clock ......................................................... 71
Interrupts............................................................. 71
Oscillator Operation ............................................ 71
Register Map............................................................... 72
Timer2 and Timer3 Selection Mode .................................... 88
Timer2/3 Module................................................................. 73
16-bit Timer Mode ...................................................... 73
32-bit Synchronous Counter Mode............................. 73
32-bit Timer Mode ...................................................... 73
ADC Event Trigger ..................................................... 76
Gate Operation ........................................................... 76
Interrupt ...................................................................... 76
Operation During Sleep Mode .................................... 76
Register Map .............................................................. 77
Timer Prescaler .......................................................... 76
Timer4/5 Module................................................................. 79
Register Map .............................................................. 81
Timing Characteristics
A/D Conversion
Low-speed (ASAM = 0, SSRC = 000) .............. 208
Band Gap Start-up Time........................................... 188
CAN Module I/O ....................................................... 205
CLKO and I/O ........................................................... 186
DCI Module
AC-Link Mode................................................... 195
Multichannel, I²S Modes................................... 193
External Clock .......................................................... 182
I²C Bus Data
Master Mode..................................................... 201
Slave Mode ...................................................... 203
I²C Bus Start/Stop Bits
Master Mode..................................................... 201
Slave Mode ...................................................... 203
Input Capture (CAPX)............................................... 191
OC/PWM Module...................................................... 192
Oscillator Start-up Timer........................................... 187
Output Compare Module .......................................... 191
Power-up Timer ........................................................ 187
Reset ........................................................................ 187
SPI Module
Master Mode (CKE = 0).................................... 196
Master Mode (CKE = 1).................................... 197
Slave Mode (CKE = 0)...................................... 198
Slave Mode (CKE = 1)...................................... 200
Type A, B and C Timer External Clock ..................... 189
Watchdog Timer ....................................................... 187
Timing Diagrams
CAN Bit..................................................................... 116
Frame Sync, AC-Link Start of Frame ....................... 128
Frame Sync, Multi-Channel Mode ............................ 128
I²S Interface Frame Sync ......................................... 128
PWM Output ............................................................... 89
Time-out Sequence on Power-up (MCLR
Not Tied to VDD), Case 1.................................. 152
Time-out Sequence on Power-up (MCLR
Not Tied to VDD), Case 2.................................. 152
Time-out Sequence on Power-up (MCLR
Tied to VDD)...................................................... 152
Timing Diagrams.See Timing Characteristics
© 2006 Microchip Technology Inc.
DS70143C-page 221