DSPIC30F6011_06 Datasheet, PDF (166/228 Pages) Microchip Technology – High-Performance, 16-Bit Digital Signal Controllers

dsPIC30F6011/6012/6013/6014
TABLE 21-2: INSTRUCTION SET OVERVIEW
Base
Instr
#
Assembly
Mnemonic
Assembly Syntax
Description
1
ADD
ADD
Acc
ADD
f
ADD
f,WREG
ADD
#lit10,Wn
ADD
Wb,Ws,Wd
ADD
Wb,#lit5,Wd
ADD
Wso,#Slit4,Acc
2
ADDC
ADDC
f
ADDC
f,WREG
ADDC
#lit10,Wn
ADDC
Wb,Ws,Wd
ADDC
Wb,#lit5,Wd
3
AND
AND
f
AND
f,WREG
AND
#lit10,Wn
AND
Wb,Ws,Wd
AND
Wb,#lit5,Wd
4
ASR
ASR
f
ASR
f,WREG
ASR
Ws,Wd
ASR
Wb,Wns,Wnd
ASR
Wb,#lit5,Wnd
5
BCLR
BCLR
f,#bit4
BCLR
Ws,#bit4
6
BRA
BRA
C,Expr
BRA
GE,Expr
BRA
GEU,Expr
BRA
GT,Expr
BRA
GTU,Expr
BRA
LE,Expr
BRA
LEU,Expr
BRA
LT,Expr
BRA
LTU,Expr
BRA
N,Expr
BRA
NC,Expr
BRA
NN,Expr
BRA
NOV,Expr
BRA
NZ,Expr
BRA
OA,Expr
BRA
OB,Expr
BRA
OV,Expr
BRA
SA,Expr
BRA
SB,Expr
BRA
Expr
BRA
Z,Expr
BRA
Wn
7
BSET
BSET
f,#bit4
BSET
Ws,#bit4
8
BSW
BSW.C Ws,Wb
BSW.Z Ws,Wb
Add Accumulators
f = f + WREG
WREG = f + WREG
Wd = lit10 + Wd
Wd = Wb + Ws
Wd = Wb + lit5
16-bit Signed Add to Accumulator
f = f + WREG + (C)
WREG = f + WREG + (C)
Wd = lit10 + Wd + (C)
Wd = Wb + Ws + (C)
Wd = Wb + lit5 + (C)
f = f .AND. WREG
WREG = f .AND. WREG
Wd = lit10 .AND. Wd
Wd = Wb .AND. Ws
Wd = Wb .AND. lit5
f = Arithmetic Right Shift f
WREG = Arithmetic Right Shift f
Wd = Arithmetic Right Shift Ws
Wnd = Arithmetic Right Shift Wb by Wns
Wnd = Arithmetic Right Shift Wb by lit5
Bit Clear f
Bit Clear Ws
Branch if Carry
Branch if greater than or equal
Branch if unsigned greater than or equal
Branch if greater than
Branch if unsigned greater than
Branch if less than or equal
Branch if unsigned less than or equal
Branch if less than
Branch if unsigned less than
Branch if Negative
Branch if Not Carry
Branch if Not Negative
Branch if Not Overflow
Branch if Not Zero
Branch if Accumulator A overflow
Branch if Accumulator B overflow
Branch if Overflow
Branch if Accumulator A saturated
Branch if Accumulator B saturated
Branch Unconditionally
Branch if Zero
Computed Branch
Bit Set f
Bit Set Ws
Write C bit to Ws<Wb>
Write Z bit to Ws<Wb>
# of # of Status Flags
Words Cycles Affected
1
1 OA,OB,SA,SB
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1 OA,OB,SA,SB
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
C,N,OV,Z
1
1
C,N,OV,Z
1
1
C,N,OV,Z
1
1
N,Z
1
1
N,Z
1
1
None
1
1
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
2
None
1
1 (2)
None
1
2
None
1
1
None
1
1
None
1
1
None
1
1
None
DS70117F-page 164
© 2006 Microchip Technology Inc.