EVB-LAN9252-DIG-IO Datasheet, PDF (15/37 Pages) Microchip Technology – EVB-LAN9252-DIG-IO EtherCAT® DIG I/O User’s Guide

Board Details & Configuration
2.4.1 Strap Options
2.4.1.1 CHIP MODE SELECTION
Table 2-2 details the LAN9252 chip mode configuration straps.
TABLE 2-2: CHIP MODE CONFIGURATION STRAP
Header
Description
Pins
Settings
J4,J5,J7,J8
Chip mode configuration strap
inputs. This strap determines
the number of active ports and
port types.
1-2 Short 1-2 for high (pull-up)
2-3 Short 2-3 for low (pull-down) (default)
Note:
For proper operation, chip mode must be in 2-port mode, where Port 0 =
PHY A and Port 1 = PHY B. This requires J4, J5, J7, and J8 to be
pulled-down (2-3) shorted. All other configurations are not supported by this
EVB.
2.4.1.2 EEPROM SIZE CONFIGURATION
The EEPROM size configuration strap (J6 & J9) determines the supported EEPROM
size range. A low selects 1Kbits (128 x 8) through 16Kbits (2K x 8)_24C16. A high
selects 32Kbits (4K x 8) through 512Kbits (64K x 8) or 4Mbits (512K x 8)_24C512.
TABLE 2-3: EEPROM SIZE CONFIGURATION STRAP
Header
Description
Pins
Settings
J6, J9
EEPROM size configuration
strap inputs. This strap deter-
mines the supported
EEPROM size range.
1-2 Short 1-2 for high (pull-up) (default)
2-3 Short 2-3 for low (pull-down)
2.4.1.3 COPPER AND FIBER STRAPS
The LAN9252 supports 100BASE-TX (Copper) and 100BASE-FX (Fiber) modes. In
100BASE-FX operation, the quality of the receive signal is provided by the external
transceiver as either an open-drain, CMOS level, Loss of Signal (SFP) or a LVPECL
Signal Detect (SFF).
This EVB supports 100BASE-TX (Copper) and SFP 100BASE-FX (Fiber) modes. By
default Copper Mode is active. Fiber Mode is supported as an assembly option. To
select the Copper or Fiber Mode, the respective strap and signal routing resister
assembly options must to be configured.
Note: Vendor part number for SFP: Finisar/FTLF1217P2,
for SFF: Avago Technologies US Inc/AFCT-5971LZ
 2014 Microchip Technology Inc.
Preliminary
DS50002332A-page 15