MRF24J40MB-I Datasheet, PDF (106/156 Pages) Microchip Technology – IEEE 802.15.4™ 2.4 GHz RF Transceiver

MRF24J40
3.10 Interframe Spacing (IFS)
Interframe Spacing (IFS) allows the MAC sublayer time
to process data received by the PHY. The length of the
IFS period depends on the size of the frame that is to be
transmitted. Frames up to aMaxSIFSFrameSize
(18 octets) in length shall be followed by a SIFS period
of at least aMinSIFSPeriod (12) symbols. Frames with
lengths greater than aMaxSIFSFrameSize shall be fol-
lowed by a LIFS period of at least aMinLIFSPeriod
(40) symbols. If the transmission requires an Acknowl-
edgment, the IFS shall follow the Acknowledgment
frame. Figure 3-8 shows the relationship between
frames and IFS periods. Refer to IEEE 802.15.4-2003,
Section 7.5.1.2 “IFS” for more information.
The IEEE 802.15.4 Specification defines
aMinSIFSPeriod as a constant value of 12 symbol
periods. The aMinSIFSPeriod can be programmed
by the MSIFS (TXSTBL 0x2E<3:0>) and RFSTBL
(TXSTBL 0x2E<7:4>) bits, where aMinSIFSPeriod =
MSIFS + RFSTBL.
The IEEE 802.15.4 Specification defines
aMinLIFSPeriod as a constant value of 40 symbol
periods. The aMinLIFSPeriod can be programmed
by the MLIFS (TXPEND 0x21<7:2>) and RFSTBL
(TXSTBL 0x2E<7:4>) bits, where aMinLIFSPeriod =
MLFS + RFSTBL.
The IEEE 802.15.4 Specification defines aTurn-
aroundTime as a constant value of 12 symbol
periods. The aTurnaroundTime can be programmed
by the TURNTIME (TXTIME 0x27<7:4>) and RFSTBL
(TXSTBL 0x2E<7:4>) bits, where aTurnaroundTime
= TURNTIME + RFSTBL.
FIGURE 3-8:
INTERFRAME SPACING (IFS)
Acknowledged Transmission:
Long Frame
ACK
Short Frame
ACK
t_ack
LIFS
t_ack
SIFS
Unacknowledged Transmission:
Long Frame
Short Frame
LIFS
SIFS
Where aTurnaroundTime ≤= t_ack =≤ (aTurnaroundTime + aUnitBackoffPeriod)
TABLE 3-12:
Addr. Name
0x21 TXPEND
0x27 TXTIME
0x2E TXSTBL
REGISTERS ASSOCIATED WITH INTERFRAME SPACING
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
MLIFS5
TURNTIME3
RFSTBL3
MLIFS4
TURNTIME2
RFSTBL2
MLIFS3
TURNTIME1
RFSTBL1
MLIFS2
TURNTIME0
RFSTBL0
MLIFS1
r
MSIFS3
MLIFS0
r
MSIFS2
Bit 1
GTSSWITCH
r
MSIFS1
Bit 0
FPACK
r
MSIFS0
DS39776C-page 106
Preliminary
© 2010 Microchip Technology Inc.