KSZ8895MLU_11 Datasheet, PDF (95/110 Pages) Micrel Semiconductor – Integrated 5-Port 10/100 Managed Switch

Micrel, Inc.
KSZ8895MLU
MIIM Registers
All the registers defined in this section can be also accessed via the SPI interface. Note that different mapping
mechanisms are used for MIIM and SPI. The “PHYAD” defined in IEEE is assigned as “0x1” for port 1, “0x2” for port 2,
“0x3” for port 3 and “0x4” for port 4.. The “REGAD” supported are 0x0-0x5 (0h-5h), 0x1D (1dh) and 0x1F (1fh).
Register 0h: MII Control
Address Name
15
Soft Reset
14
Loop Back
13
Force 100
12
AN Enable
11
Power Down
10
PHY Isolate
9
Restart AN
8
Force Full Duplex
7
Collision Test
6
Reserved
5
Hp_mdix
4
Force MDI
3
Disable Auto MDI/MDI-X
2
Disable far End fault
1
Disable Transmit
0
Disable LED
Description
1, PHY soft reset.
0, Normal operation.
1 = Perform MAC loopback, loop back path as follows:
Assume the loop-back is at port 1 MAC, port 2 is the
monitor port.
Port 1 MAC Loopback (port 1 reg. 0, bit 14 = ‘1’)
Start: RXP2/RXM2 (port 2). Can also start from
port 3, 4, 5
Loopback: MAC/PHY interface of port 1’s MAC
End: TXP2/TXM2 (port 2). Can also end at port 3,
4, 5 respectively
Setting address ox3,4,5 reg. 0, bit 14 = ‘1’ will
perform MAC loopback on port 3, 4, 5 respectively.
0 = Normal Operation.
1, 100Mbps.
0, 10Mbps.
1, Auto-negotiation enabled.
0, Auto-negotiation disabled.
1, Power down.
0, Normal operation.
1, Electrical PHY isolation of PHY from Tx+/Tx-.
0, Normal operation.
1, Restart Auto-negotiation.
0, Normal operation.
1, Full duplex.
0, Half duplex.
Not supported.
1 = HP Auto MDI/MDI-X mode
0 = Micrel Auto MDI/MDI-X mode
1, Force MDI.
0, Normal operation.
1, Disable auto MDI/MDI-X.
0, Normal operation.
1, Disable far end fault detection.
0, Normal operation.
1, Disable transmit.
0, Normal operation.
1, Disable LED.
0, Normal operation.
Mode
R/W
(SC)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
1
1
0
0
0
0
0
0
1
0
0
0
0
0
October 2011
95
M9999-100311-1.1