KSZ8895MLU_11 Datasheet, PDF (57/110 Pages) Micrel Semiconductor – Integrated 5-Port 10/100 Managed Switch

Micrel, Inc.
Port Registers (Continued)
Register 18 (012): Port 1 Control 2
Register 34 (022): Port 2 Control 2
Register 50 (032): Port 3 Control 2
Register 66 (042): Port 4 Control 2
Register 82 (052): Port 5 Control 2
Address Name
7
User Priority Ceiling
6
Ingress VLAN Filtering.
5
Discard Non-PVID
packets
Description
1, If packet ‘s “user priority field” is greater than the “user
priority field” in the port default tag register, replace the
packet’s “user priority field” with the “user priority field” in
the port default tag register control 3.
0, no replace packet’s priority filed with port default tag
priority filed of the port register control 3 bit [7:5].
1, the switch will discard packets whose VID port
membership in VLAN table bit[20:16] does not include
the ingress port.
0, no ingress VLAN filtering.
1, the switch will discard packets whose VID does not
match ingress port default VID.
0, no packets will be discarded.
Mode
R/W
R/W
R/W
KSZ8895MLU
Default
0
0
0
October 2011
57
M9999-100311-1.1