PL123E-09 Datasheet, PDF (9/10 Pages) Micrel Semiconductor – Low Skew Zero Delay Buffer

TEST CIRCUITS
0.1 F
0.1 F
(Preliminary) PL123E-09
Low Skew Zero Delay Buffer
Test Circuit #1
VDD
OUTPUTS
VDD
GND GND
CLK
C_{L O AD}
PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT)
16 PIN Narrow SOP, TSSOP ( mm )
SOP
TSSOP
EH
Symbol Min.
Max.
Min. Max.
A
1.35
1.75
-
1.20
A1
0.10
0.25
0.05
0.15
D
B
0.33
0.51
0.19
0.30
C
0.19
0.25
0.09
0.20
D
9.80
10.00
4.90
5.10
E
3.80
4.00
4.30
4.50
H
5.80
6.20
6.40 BSC
L
0.40
1.27
0.45
0.75
A1
C
e
1.27 BSC
0.65 BSC
B
e
A
L
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel [phone] • fax [phone] • www.micrel.com Rev 12/13/11 Page 9