MIC4102_11 Datasheet, PDF (15/17 Pages) MIC GROUP RECTIFIERS – 100V Half Bridge MOSFET Driver with Anti-Shoot Through Protection PRELIMINARY SPECIFICATIONS

Micrel, Inc.
Current in the high-side driver is sourced from capacitor
C_B and flows into the HB pin and out the HO pin, into
the gate of the high side MOSFET. The return path for
the current is from the source of the MOSFET and back
to capacitor C_B. The high-side circuit return path usually
does not have a low impedance ground plane so the
etch connections in this critical path should be short and
wide to minimize parasitic inductance. As with the low-
side circuit, impedance between the MOSFET source
and the decoupling capacitor causes negative voltage
feedback which fights the turn-on of the MOSFET.
It is important to note that capacitor CB must be placed
close to the HB and HS pins. This capacitor not only
provides all the energy for turn-on but it must also keep
HB pin noise and ripple low for proper operation of the
high-side drive circuitry.
Low-side drive turn-on
current path
Vdd
gnd ^CVdd
plane
HB
HO
C_B
HS
High-side drive turn-on
current path
LO
Vss
gnd
_
plane
Q
FF
Q
PWM
Level
shift
LS
Figure 9. Turn-on Current Paths
Figure 10 shows the critical current paths when the
driver outputs go low and turn off the external
MOSFETs. Short, low impedance connections are
important during turn-off for the same reasons given in
the turn-on explanation. Current flowing through the
internal diode replenishes charge in the bootstrap
capacitor, CB.
MIC4102
C_Vdd
Charge C_B through
internal diode when
HS pin is low
Vdd
HB
HO
C_B
HS
High-side drive turn-off
current path
Low-side drive turn-off
current path
LO
Vss
Level
shift
_
Q
FF
Q
PWM
LS
Figure 10. Turn-off Current Paths
The following circuit guidelines should be adhered to for
optimum circuit performance:
1. The Vcc and HB bypass capacitors must be
placed close to the supply and ground pins. It is
critical that the etch length between the high
side decoupling capacitor (C_B) and the HB & HS
pins be minimized to reduce lead inductance.
2. A ground plane should be used to minimize
parasitic inductance and impedance of the
return paths. The MIC4102 is capable of greater
than 3A peak currents and any impedance
between the MIC4102, the decoupling
capacitors and the external MOSFET will
degrade the performance of the driver.
3. Trace out the high di/dt and dv/dt paths, as
shown in Figures 9 and 10 to minimize the etch
length and loop area for these connections.
Minimizing these parameters decreases the
parasitic inductance and the radiated EMI
generated by fast rise and fall times.
A typical layout of a synchronous Buck converter
power stage using the MIC4102 (Figure 11) is
shown in Figure 12.
November 2006
15
M9999-112806