MG84FL54BD Datasheet, PDF (29/113 Pages) Megawin Technology Co., Ltd – Four and half configurable I/O ports

The push-pull mode may be used when more source current is needed from a port output. In addition, the input
path of the port pin in this configuration is also the same as quasi-bidirectional mode.
Fig 10-4 Push-Pull Output
VDD
Port latch data
Port pin
Input data
10.2. Maximum Ratings for Port Outputs
While port pins function as outputs (which can source or sink a current), to prevent the device from being
permanently damaged, users should take care the total current not more than 40mA for sourcing or sinking. It
means that the device can source total 40mA and sink total 40mA at the same time without causing any
damage to it self.
10.3. Port Register
The registers PxM0 and PxM1 are listed below.
P0M0 (Address=93H, Port 0 Mode Register 0)
7
6
5
4
P0M0.7 P0M0.6 P0M0.5 P0M0.4
3
P0M0.3
2
P0M0.2
1
P0M0.1
0
P0M0.0
P0M1 (Address=94H, Port 0 Mode Register 1)
7
6
5
4
P0M1.7 P0M1.6 P0M1.5 P0M1.4
3
P0M1.3
2
P0M1.2
1
P0M1.1
0
P0M1.0
P1M0 (Address=91H, Port 1 Mode Register 0)
7
6
5
4
P1M0.7 P1M0.6 P1M0.5 P1M0.4
3
P1M0.3
2
P1M0.2
1
P1M0.1
0
P1M0.0
P1M1 (Address=92H, Port 1 Mode Register 1)
7
6
5
4
P1M1.7 P1M1.6 P1M1.5 P1M1.4
3
P1M1.3
2
P1M1.2
1
P1M1.1
0
P1M1.0
P2M0 (Address=95H, Port 2 Mode Register 0)
7
6
5
4
P2M0.7 P2M0.6 P2M0.5 P2M0.4
3
P2M0.3
2
P2M0.2
1
P2M0.1
0
P2M0.0
P2M1 (Address=96H, Port 2 Mode Register 1)
7
6
5
4
P2M1.7 P2M1.6 P2M1.5 P2M1.4
3
P2M1.3
2
P2M1.2
1
P2M1.1
0
P2M1.0
MEGAWIN
MG84FL54B Data sheet
29