8143 Datasheet, PDF (14/24 Pages) Maxwell Technologies – 12-Bit Serial Daisy Chain D/A Converter

12-Bit Serial Daisy-Chain D/A Converter
8143
The CLR input allows asynchronous resetting of the DAC register to 0000 0000 0000. This reset does not affect data
held in the input registers. While in unipolar mode, a CLEAR will result in the analog output going to 0V. In bipolar
mode, the output will go to -V_REF.
Interface Input Description
STB₁ (Pin 4), STB₂ (Pin 8), STB₄ (Pin 11) - Input register and buffered output strobe. Inputs active on falling edge.
Selected to load serial data into input register and buffered output stage. See Table 3 for details.
STB₃ (Pin 10) - Input register and buffered output strobe input. Active on falling edge. Selected to load serial data into
input register and buffered output stage. See Table 3 for details.
LD₁ (Pin 5), LD₂ (Pin 9) - Load DAC register inputs. Active low. Selected together to load contents of input register into
DAC register.
CLR (Pin 13) - Clear input. Active low. Asynchronous. When LOW, 12-bit DAC register is forced to a zero code (0000
0000 0000) regardless of other interface inputs.
FIGURE 15. TIMING DIAGRAM
* Strobe waveform is inverted if STB₃ is used to strobe serial data bits into input register.
** Data is strobed into and out of the input shift register MSB first.
INPUT REGISTER/DIGITAL
OUTPUT
STB4
STB3
0
1
0
1
0
"
1
TABLE 1. TRUTH TABLE
CONTROL INPUTS
DAC
REGISTER
CONTROL INPUT
STB2
STB1
CLR
LD2
LD1
0
X
X
X
0
X
X
X
0
0
X
X
X
0
0
X
X
X
OPERATION
NOTES
Serial data bit loaded from ¹,²
SRI into input register and
digital output (SRO pin)
after 12 clocked bits
07.23.03 REV 3
All data sheets are subject to change without notice 14
©2003 Maxwell Technologies.
All rights reserved.