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8143 Datasheet, PDF (12/24 Pages) Maxwell Technologies – 12-Bit Serial Daisy Chain D/A Converter
12-Bit Serial Daisy-Chain D/A Converter
FIGURE 13. EQUIVALENT CIRCUIT (ALL INPUT HIGH)
8143
Dynamic Performance
Analog Output Impedance
The output resistance, as in the case of the output capacitance, varies with the digital input code. This resistance,
looking back into the IOUT1 terminal, varies between 11 kW (the feedback resistor alone when all digital input are
LOW) and 7.5 kΩ (the feedback resistor in parallel with approximately 30 kΩ of the R-2R ladder network resistance
when any single bit logic is HIGH). Static accuracy and dynamic performance will be affected by these variations.
The gain and phase stability of the output amplifier, board layout, and power supply decoupling will all affect the
dynamic performance of the 8143. The use of a small compensation capacitor may be required when high speed
operational amplifier’s feedback resistor to provide the necessary phase compensation to critically damp the output.
The considerations when using high speed amplifiers are:
1. Phase compensation (see Figures 16 and 17).
2. Power supply decoupling at the device socket and use of proper grounding techniques.
Output Amplifier Considerations
When using high speed op amps, a small feedback capacitor (typically 5 pF-30 pF) should be used across the amplifi-
ers to minimize overshoot and ringing. For low speed or static applications, ac specification of the amplifier are not
very critical. In high speed applications, slew rate, settling time, open-loop gain and gain/phase margin specifications
of the amplifier should be selected for the desired performance. It has already been noted that an offset can be caused
by including the usual bias current compensation resistor in the amplifier’s noninverting input terminal. This resistor
should not be used. Instead, the amplifier should have a bias current that is low over the temperature range of interest.
Static accuracy is affected by the variation in the DAC’s output resistance. This variation is best illustrated by using the
circuit of Figure 14 and the equation:
07.23.03 REV 3
All data sheets are subject to change without notice 12
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