MAX1462 Datasheet, PDF (8/16 Pages) Maxim Integrated Products – Low-Voltage, Low-Power, 16-Bit Smart ADC

Low-Voltage, Low-Power,
16-Bit Smart ADC
0.010
0.008
0.006
0.004
0.002
0
-0.002
-0.004
-0.006
-0.008
-0.010
-100 -80 -60 -40 -20 0 20 40 60 80 100
SENSOR SIGNAL INPUT OR ADC INPUT/OUTPUT RANGE (%)
Figure 2a. Analog Front-End Integrated Nonlinearity (INL) (typ)
4
3
2
1
0
-1
-2
-3
-4
-100 -80 -60 -40 -20 0 20 40 60 80 100
SENSOR SIGNAL INPUT OR ADC INPUT RANGE (%)
Figure 2b. Analog Front-End Differential Nonlinearity (DNL) (typ)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
-100 -80 -60 -40 -20 0 20 40 60 80 100
SENSOR SIGNAL INPUT OR ADC INPUT/OUTPUT RANGE (%)
Figure 2c. Analog Front-End Noise Standard Deviation of the
Samples (typ)
2MHz clock signal. It is not necessary to remove the
resonator. RESET must be low for at least 16 clock
cycles to initialize the MAX1462. Then, a rising transi-
tion on RESET begins a 32-bit serial transfer of the test-
system command word through SDIO. The test system
transitions SDIO on falling edges of the XIN clock; the
MAX1462 latches data on the rising edge (Figure 3).
The 32-bit command word generated by the test sys-
tem is divided into four fields (Figure 3). The 4-bit com-
mand field is interpreted in Table 4. The other fields are
usually ignored, except that command 1 hex uses the
two register fields, and command 2 hex requires an
EEPROM address. The command word fields are:
• Register Data Field: Holds the calibration coeffi-
cients to be written into the MAX1462 16-bit registers
• EEPROM Address Field: Holds the hexadecimal
address of the EEPROM bit to be set (from 00 hex to
7F hex)
• Register Address Field: Contains the address of
the register (0 to 7) where the calibration coefficient
is to be written
• Command Field: Instructs the MAX1462 to take a
particular action (Table 4)
Writing to the DSP Registers
Command 1 hex writes calibration coefficients from the
test system directly into the DSP registers. Tester com-
mands 8 hex and C hex cause the MAX1462 to start a
conversion using the calibration coefficients in the reg-
isters. This direct use of the registers speeds calibra-
tion and compensation because it does not require
EEPROM write-access time. Bringing RESET low clears
the DSP registers, so the test system should always
write to the registers and start a conversion in a single
command timing sequence.
As shown in Table 5, seven registers hold the calibra-
tion coefficients of the characteristic equation:
[D_OUT = Gain (1 + G₁T + G₂T²) (Signal + Of₀ + Of₁T + Of₂T²)
+ D_OFF] implemented by the MAX1462 DSP. All of the
registers are 16-bit, two’s complement coding format.
When a register is interpreted as an integer, the deci-
mal range is from -32768 (8000 hex) to +32767 (7FFF
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