MAX1462 Datasheet, PDF (10/16 Pages) Maxim Integrated Products – Low-Voltage, Low-Power, 16-Bit Smart ADC

Low-Voltage, Low-Power,
16-Bit Smart ADC
Table 4. Test System Commands
COMMAND
Write a calibration coefficient into a DSP register.
Block-Erase the entire EEPROM (writes “0” to all 128 bits).
Write 1 to a single EEPROM bit.
NOOP (NO-OPeration).
Start Conversion command. The registers are not updated with EEPROM values.
SDIO and SDO are enabled as DSP outputs.
Start Conversion command. The registers are updated with EEPROM values. SDIO
and SDO are enabled as DSP outputs.
Start Conversion command. The registers are not updated with EEPROM values.
SDIO and SDO are disabled.
Start Conversion command. The registers are updated with EEPROM values. SDIO
and SDO are disabled.
Reserved
HEX CODE
1 hex
4 hex
2 hex
0 hex
8 hex
A hex
C hex
E hex
3, 5, 6, 7, 9, B, D, F hex
C3 C2 C1 C0
0001
0100
0010
0000
1000
1010
1100
1110
————
Table 5. DSP Calibration Coefficient Registers
COEFFICIENT
Gain
G₁
G₂
Of₀
Of₁
Of₂
D_OFF
REGISTER
ADDRESS
1
2
3
4
5
6
7
FUNCTION
Gain correction
Linear TC gain
Quadratic TC gain
Offset correction
Linear TC offset
Quadratic TC offset
Output midscale pedestal
RANGE
-32768 to +32767
-1.0 to +0.99997
-1.0 to +0.99997
-1.0 to +0.99997
-1.0 to +0.99997
-1.0 to +0.99997
-32768 to +32767
FORMAT
Integer
Fraction
Fraction
Fraction
Fraction
Fraction
Integer
The internal 128-bit EEPROM is arranged as eight 16-
bit words. These eight words are the configuration
register and the seven calibration-coefficient values
(Table 7).
The MAX1462 EEPROM is bit addressable. The final cal-
ibration coefficients must be mapped into the
EEPROM locations that are to be set. There is no bit-
clear instruction. Any EEPROM write operation is neces-
sarily long because the internal charge pump must
create and maintain voltages above 20V long enough to
cause a reliably permanent change in the memory.
Writing an EEPROM bit requires 6ms, so writing the
EEPROM typically requires <400ms. Do not decrease
the EEPROM write times.
To write an EEPROM bit, V_DD must be raised to 5.0V
(nominal) and the test system must be compliant with the
Command Timing Diagram shown in Figure 3. With the
appropriate driving voltage levels for this new value of
supply voltage, perform the following operations:
1) Issue command 0 hex, including the EEPROM
address field of the bit to be written.
2) Issue command 2 hex, with the address field used in
step 1. Continuously repeat this command 375 times
(6ms).
3) Issue command 0 hex, including the EEPROM
address field used in steps 1 and 2.
The procedure for using command 4 hex (Block-Erase
the EEPROM) is similar. Record the Maxim Reserved
bits in the configuration register prior to using this com-
mand, and restore them afterwards. The number of
Block-Erase operations should not exceed 100:
1) Issue command 0 hex.
2) Issue command 4 hex. Continuously repeat this
command 375 times (6ms).
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